Mitsubishi Electric MELSEC-Q/L - N-Word Shift to Right of N-Word Data, N-Word Shift to Left of N-Word Data

7 APPLICATION INSTRUCTIONS
7.3 Shift Instructions
401
7
n-word shift to right of n-word data, n-word shift to left of n-word
data
SFTWR(P), SFTWL(P)
Processing details
■SFTWR(P)
• This instruction shifts n1 words data in the devices starting from the device specified by (D) to the right by n2 words.
n1=9, n2=4
• The n2 words data in the devices starting from the highest device are filled with 0s.
• If the value specified by n1 or n2 is 0, the instruction will be not processed.
• If the value of n2 is equal to or larger than the value of n1, the n1 words data in the devices starting from the device
specified by (D) will be filled with 0s.
• QnU(D)(H)CPU, QnUDE(H)CPU: the serial number (first five digits) is "10102" or later
• Q00UJCPU, Q00UCPU, Q01UCPU, QnUDVCPU: Supported
(D): Head number of the devices to be shifted (BIN 16 bits)
n1: Number of words to be shifted (BIN 16 bits)
n2: Number of shifts (BIN 16 bits)
Setting
data
Internal device R, ZR J\ U\G Zn Constant
K, H
Others
Bit Word Bit Word
(D)  
n1  
n2  
Basic
High
performance
Process Redundant Universal LCPU
Ver.
Command
Command
SFTWR, SFTWL
SFTWRP, SFTWLP
P
n2
n2
D
n1
n1
D
indicates an instruction symbol of SFTWR/SFTWL.
Filled with 0H
+2
+1
D D
+3
D
+4
D
+5
D
n2
+6
D
+7
D
+8
D D
n1
+2
+1
D D
+3
D
+4
D
+5
D
+6
D
+7
D
+8
D D
30F
H
0
HH H H HH HH H
HHHHHHHH
1E 100 0 1FF 10 1F 7FF 2A
0 0 0 30F 1E 100 0 1FF