Mitsubishi Electric MELSEC-Q/L - Bit Tests

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7 APPLICATION INSTRUCTIONS
7.4 Bit Processing Instructions
Bit tests
TEST(P), DTEST(P)
Processing details
■TEST
• Fetches bit data at the location designated by (S2) within the word device designated by (S1), and writes it to the bit device
designated by (D).
• The bit device designated by (D) is OFF when the relevant bit is "0" and ON when it is "1".
• The position designated by (S2) indicates the position of an individual bit in a 1-word data block (0 to 15). When 16 or more
is designated at (S2), the target is the bit data at the position indicated by the remainder of n / 16. For example, when n =
18, the target is the data at b2 since the remainder of 18 / 16 =1 is "2".
■DTEST
• Fetches bit data at the location designated by (S2) within the 2-word device designated by (S1), or (S1)+1, and writes it to
the bit device designated by (D).
• The bit device designated by (D) is OFF when the relevant bit is "0" and ON when it is "1".
• The position designated by (S2) indicates the position of an individual bit in a 2-word data block (0 to 31). When 32 or more
is designated at (S2), the target is the bit data at the position indicated by the remainder of n / 32. For example, when n =
34, the target is the data at b2 since the remainder of 34 / 32 =1 is "2".
(S1): Number of the device where bit data to be extracted is stored (BIN 16/32 bits)
(S2): Location of the bit data to be extracted (0 to 15 (TEST)/0 to 31 (DTEST)) (BIN 16 bits)
(D): Number of the bit device where the extracted data will be stored (bits)
Setting
data
Internal device R, ZR J\ U\G Zn Constant
K, H
Others
Bit Word Bit Word
(S1)  
(S2)  
(D)  (Other than T, ST, C) 
Basic
Process
High
performance
Redundant Universal LCPU
Command
Command
P
TEST, DTEST
TESTP, DTESTP
S1
S2
S1
S2
D
D
indicates an instruction symbol of TEST/DTEST.
bit
b15 b0
b5
S1
D
S2
S2
(When =5)
S1
D
b15 b0b31 b16b21
S1
+1
bit
S2
S2
(When =21)