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APPENDICES
Appendix 1 Operation Processing Time
Operation processing time of High Performance model QCPU/
Process CPU/Redundant CPU
The processing time for the individual instructions are shown in the table on the following pages.
Operation processing times can vary substantially depending on the nature of the sources and destinations of the instructions,
and the values contained in the following tables should therefore be taken as a set of general guidelines to processing time
rather than as being strictly accurate.
When using the file resister (ZR), module access device (Un\G, U3En\G0 to G4095), or link direct device
(Jn\), add the processing time shown in Page 920 Table of the time to be added when file register, module
access device or link direct device is used to that of each instruction.
Processing time
■Sequence instructions
Instruction Condition (device) Processing time (s)
Qn QnH QnPH QnPRH
LD
LDI
AND
ANI
OR
ORI
0.079 0.034 0.034 0.034
LDP
LDF
ANDP
ANDF
ORP
ORF
0.158 0.068 0.068 0.068
ANB
ORB
MPS
MRD
MPP
0.079 0.034 0.034 0.034
INV When not executed 0.079 0.034 0.034 0.034
When executed
MEP
MEF
When not executed 0.173 0.073 0.073 0.073
When executed
EGP
EGF
When not
executed
(OFFOFF)
(ONON)
0.158 0.068 0.068 0.068
When executed (OFFON)
(ONOFF)
OUT When not
changed
(OFFOFF) 0.158 0.068 0.068 0.068
(ONON)
When changed (OFFON) 0.158 0.068 0.068 0.068
(ONOFF)
F When not executed 2.8 1.2 1.2 1.2
When executed 162 69.7 69.7 69.7
T When not executed 0.63 0.27 0.27 0.27
When
executed
After time up 0.63 0.27 0.27 0.27
When added K 0.63 0.27 0.27 0.27
D 0.63 0.27 0.27 0.27
C When not executed 0.63 0.27 0.27 0.27
When
executed
After time up 0.63 0.27 0.27 0.27
When added K 0.63 0.27 0.27 0.27
D 0.63 0.27 0.27 0.27