Mitsubishi Electric MELSEC-Q/L - Page 922

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APPENDICES
Appendix 1 Operation Processing Time
■Table of the time to be added when file register, module access device or link direct device is
used
Device name Data Device specification
location
Processing time (s)
QnCPU QnHCPU QnPHCPU QnPRHCPU
File register (ZR) When standard RAM is
used
Bit Source 5.56 2.40 2.40 2.40
Destination 4.44 1.91 1.91 1.91
Word Source 2.60 1.12 1.12 1.12
Destination 3.76 1.62 1.62 1.62
Double word Source 2.83 1.22 1.22 1.22
Destination 4.00 1.72 1.72 1.72
When SRAM card is
used (Q2MEM-1MBS,
Q2MEM-2MBS)
Bit Source 5.22 2.25 2.25 2.25
Destination 4.09 1.76 1.76 1.76
Word Source 2.25 0.97 0.97 0.97
Destination 3.42 1.47 1.47 1.47
Double word Source 2.49 1.07 1.07 1.07
Destination 3.65 1.57 1.57 1.57
When SRAM card is
used (Q3MEM-4MBS)
Bit Source 5.16 2.2 2.2 2.2
Destination 4.05 1.73 1.73 1.73
Word Source 2.23 0.92 0.92 0.92
Destination 3.34 1.44 1.44 1.44
Double word Source 2.37 0.98 0.98 0.98
Destination 3.57 1.5 1.5 1.5
Module access device (Un\G, U3En\G0 to
G4095)
Bit Source 35.56 15.31 15.31 15.31
Destination 65.08 28.01 28.01 28.01
Word Source 32.76 14.10 14.10 14.10
Destination 28.84 12.41 12.41 12.41
Double word Source 32.99 14.20 14.20 14.20
Destination 29.07 12.51 12.51 12.51
Link direct device (Jn\) Bit Source 75.67 32.57 32.57 32.57
Destination 138.65 59.67 59.67 59.67
Word Source 72.73 31.30 31.30 31.30
Destination 137.32 59.10 59.10 59.10
Double word Source 72.96 31.40 31.40 31.40
Destination 137.55 59.20 59.20 59.20