Mitsubishi Electric MELSEC-Q/L - Counting Step Number

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3 CONFIGURATION OF INSTRUCTIONS
3.8 Counting Step Number
3.8 Counting Step Number
The number of steps in CPU module sequence instructions, basic instructions, and application instructions differs depending
on whether indirect setting of the device used is possible or not.
Counting the number of basic steps
The basic number of steps for basic instructions and application instructions is calculated by adding the device number and 1.
For example, the "+ instruction" would be calculated as follows:
Conditions for increasing the number of steps
The number of steps is increased over the number of basic steps in cases where a device is used that is designated indirectly
or for which the number of steps is increased.
■When device is designated indirectly
In cases where indirect designation is done by @, the number of steps is increased 1 step over the number of basic steps.
For example, when a 3-step MOV instruction is designated indirectly (example: MOV K4X0 @D0), one step is added and the
instruction becomes 4 steps.
■Devices with additional steps (the Basic Model QCPU, High Performance model QCPU,
Process CPU, and Redundant CPU)
■Devices with additional steps (Universal model QCPU(except Q00UJCPU) and LCPU)
The following table shows steps depending on the devices.
Devices with additional steps Added steps Example
Intelligent function module device 1 MOV U4\G10 D0
Multiple CPU shared device MOV U3E1\G0
D0
Link direct device MOV J3\B20
D0
Index register MOV Z0
D0
Serial number access format file register MOV ZR123
D0
32-bit constant DMOV K123
D0
Real constant EMOV E0.1
D0
Character string constant For even numbers: (number of characters) / 2
For odd numbers: (number of characters + 1) / 2
$MOV "123"
D0
Instruction symbol Devices with additional steps Added steps
(number of
instruction
steps)
Number of basic
steps
LD, LDI, AND, ANI, OR, ORI, LDP, LDF, ANDP,
ANDF, ORP, ORF
Serial number access format file register, Extended data
register (D), Extended link register (W)
1(2) 1
Multiple CPU shared device
*3
LDPI, LDFI Serial number access format file register, Extended data
register (D), Extended link register (W)
1(4) 3
Multiple CPU shared device
*3
ANDPI, ANDFI, ORPI, ORFI Serial number access format file register, Extended data
register (D), Extended link register (W)
1(5) 4
Multiple CPU shared device
*3
D0+ D10D20
(1) (2)
(3)
Number of devices 3 Number of basic steps: 4
+ D0 D10
(1)
(2)
Number of devices 2 Number of basic steps: 3