3 CONFIGURATION OF INSTRUCTIONS
3.8 Counting Step Number
119
3
SET Serial number access format file register, Extended data
register (D), Extended link register (W)
1(2) 1
Multiple CPU shared device
*3
OUT Timer/Counter 3(4) 1
Serial number access format file register, Extended data
register (D), Extended link register (W)
1(2)
Multiple CPU shared device
*3
RST (bit device) Serial number access format file register, Extended data
register (D), Extended link register (W)
1(2) 1
Multiple CPU shared device
*3
RST (word device) Timer/Counter (Bit/word device) 2(4) 2
Serial number access format file register, Extended data
register (D), Extended link register (W)
1(3)
Multiple CPU shared device
*3
1(3)
LD=, LD<>, LD<, LD<=, LD>, LD>=, AND=,
AND<>, AND<, AND<=, AND>, AND>=, OR=,
OR<>, OR<, OR<=, OR>, OR>=
Standard device register
*2
-1 3
Serial number access format file register, Extended data
register (D), Extended link register (W)
1
Multiple CPU shared device
*3
LDD=, LDD<>, LDD<, LDD<=, LDD>, LDD>=,
ANDD=, ANDD<>, ANDD<, ANDD<=, ANDD>,
AND>=, ORD=, ORD<>, ORD<, ORD<=,
ORD>, ORD>=
Standard device register
*2
-1 3
Serial number access format file register, Extended data
register (D), Extended link register (W)
1
Multiple CPU shared device
*3
Decimal constant, hexadecimal constant, real constant
+, -, +P, -P, WAND, WOR, WXOR, WXNR,
WANDP, WORP, WXORP, WXNRP (2 devices)
Standard device register
*2
(D): -1 3
Serial number access format file register, Extended data
register (D), Extended link register (W)
(S): 1, (D): 3
Multiple CPU shared device
*3
D+, D-, D+P, D-P, DAND, DOR, DXOR, DXNR,
DANDP, DORP, DXORP, DXNRP (2 devices)
Standard device register
*2
(D): -1 3
Serial number access format file register, Extended data
register (D), Extended link register (W)
(S): 1, (D): 3
Multiple CPU shared device
*3
Decimal constant, hexadecimal constant, real constant (S): 1
+, -, +P, -P, WAND, WOR, WXOR, WXNR,
WANDP, WORP, WXORP, WXNRP (3
devices)
*1
Serial number access format file register, Extended data
register (D), Extended link register (W)
(S1), (S2): 1, (D): 2 3
Multiple CPU shared device
*3
D+, D-, D+P, D-P, DAND, DOR, DXOR, DXNR,
DANDP, DORP, DXORP, DXNRP (3 devices)
*1
Serial number access format file register, Extended data
register (D), Extended link register (W)
(S1), (S2): 1, (D): 2 3
Multiple CPU shared device
*3
Decimal constant, hexadecimal constant, real constant (S1), (S2): 1
*, *P, /, /P Serial number access format file register, Extended data
register (D), Extended link register (W)
(S1), (S2): 1, (D): 2 3
Multiple CPU shared device
*3
D*, D*P, D/, D/P, E*, E*P Serial number access format file register, Extended data
register (D), Extended link register (W)
(S1), (S2): 1, (D): 2 3
Multiple CPU shared device
*3
Decimal constant, hexadecimal constant, real constant (S1), (S2): 1
INC, INCP, DEC, DECP, DINC, DINCP, DDEC,
DDECP
Index register / standard device register
*2
-1 2
Serial number access format file register, Extended data
register (D), Extended link register (W)
3
Multiple CPU shared device
*3
MOV, MOVP Serial number access format file register, Extended data
register (D), Extended link register (W)
12
Multiple CPU shared device
*3
Instruction symbol Devices with additional steps Added steps
(number of
instruction
steps)
Number of basic
steps
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