Mitsubishi Electric MELSEC-Q/L - Bit Shift Right

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7 APPLICATION INSTRUCTIONS
7.3 Shift Instructions
Bit shift right
SFTR(P)
*1 Do not set a negative value in the number of bit points (n2) to be shifted to the right.
Processing details
• This instruction shifts bit data for (n2) bits to the right within the data range of (n1) bits starting from (D). After the shift, the
function transfers (n2)-bit data from (S) to the (n2) bits from ((D)+(n1))-(n2).
• QnUDVCPU, LCPU: The serial number (first five digits) is "16112" or later.
(S): Start number (bit) of the bit devices to be stored in empty data after shifting to the right
(D): Start number of bit device to shift to the right (bit)
n1: Bit data length of shift data (n2  n1  1024) (BIN 16 bits)
n2: Number of bit points to shift to the right (n2  n1  1024)
*1
(BIN 16 bits)
Setting
data
Internal device R, ZR J\ U\G Zn Constant
K, H
Others
Bit Word Bit Word
(S)  
(D)  
n1  
n2  
(1) Overflow (deletion data)
(2) n2 bits shift to the right (n2=3)
(3) Coping n2 points
Basic
High
performance
Process Redundant Universal
Ver.
LCPU
Ver.
SFTRP
SFTR
SFTR
SFTRP
S
D
D
n1
n1
n2
n2S
Command
Command
(3)
(1)
(2)
(D)+8 (D)+7 (D)+6 (D)+5 (D)+4 (D)+3 (D)+2 (D)+1 (D)
(D)+8 (D)+7 (D)+6 (D)+5 (D)+4 (D)+3 (D)+2 (D)+1 (D)
(S)+2 (S)+1 (S)
(S) to (S)+2 before execution (n2=3) (D)+3 to (D)+8 before execution (n2=3)(D)
Number of (n1) points (n1=9)
Before
execution
After
execution
Number of (n2) points (n2=3)