Mitsubishi Electric MELSEC-Q/L - Shift Instructions; N-Bit Shift to Right of 16-Bit Data, N-Bit Shift to Left of 16-Bit Data

7 APPLICATION INSTRUCTIONS
7.3 Shift Instructions
391
7
7.3 Shift Instructions
n-bit shift to right of 16-bit data, n-bit shift to left of 16-bit data
SFR(P), SFL(P)
Processing details
■SFR
• Causes a shift to the right by n bits of the 16-bit data from the device designated at (D). The n bits from the upper bit are
filled with 0s.
• When a bit device is designated for (D), a right shift is executed within the device range specified by digit specification. The
number of bits by which a shift is executed is the remainder of n / (specified number of bits). For example, when n = 15 and
(specified number of bits) = 8 bits, the remainder of 15 / 8 = 1 is "7", and the data is shifted 7 bits.
• Specify any of 0 to 15 as n. If the value specified as n is 16 or greater, the remainder of n / 16 is used for a shift to the right.
For example, when n = 18, the data is shifted 2 bits to the right since the remainder of 18 / 16 =1 is 2.
(D): Head number of the devices where shift data is stored (BIN 16 bits)
n: Number of shifts (0 to 15) (BIN 16 bits)
Setting
data
Internal device R, ZR J\ U\G Zn Constant
K, H
Others
Bit Word Bit Word
(D)  
n  
Basic
Process
High
performance
Redundant Universal LCPU
Command
Command
P
D
n
D
n
SFR, SFL
SFRP, SFLP
indicates an instruction symbol of SFR/SFL.
1110 1110 1110 1110
0000001110 1110 11
b15 b8 b0
b7
b0
b7
b15 b8
1
b14
b13
b12 b11
b10 b9 b6
b5 b4
b3
b2 b1
b14
b13
b12 b11
b10 b9 b6
b5 b4
b3
b2 b1
Carry flag
(SM700)
Filled with 0s.
When n=6:
D
D
1 0 1 0 1 0 1 0 1 0 1 0
0000
1
0
1
0
1
0
1
0
Y18 Y10Y17
Y10Y17Y18
1
Y1B Y14 Y13
Y1B Y14Y13
Carry flag
(SM700)
When n = 4:
Filled with 0s.