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Mitsubishi Electric MELSEC-Q/L - Pulse Width Modulation

Mitsubishi Electric MELSEC-Q/L
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6 BASIC INSTRUCTIONS
6.8 Other Convenient Instructions
351
6
Pulse width modulation
PWM
*1 Only output (Y) can be used.
Processing details
Outputs the pulse of the cycle set by n2, for the amount of time ON designated by n1, to the output module designated by
(D).
The setting ranges for n1 and n2 are shown below:
*2 The value specified by n1 should be less than the value specified by n2.
With the PWM instruction, the argument device data is registered in the work area of the CPU module and
counting operation is processed as a system interrupt. (The device data registered in the work area is
cleared by turning the execution command OFF, or turning the STOP/RUN switch STOPRUN.) The
interrupt interval (interrupt interval of n1, n2) of the CPU module is 1ms. For this reason, the PWM
instruction can be used only once within all the programs being executed by the CPU module.
When both n1 and n2 are 0, when n1 n2, or when the PWM instruction is executed twice or more, the
instruction is not processed.
Do not change the argument for the PWM instruction during pulse output directed by the PWM instruction
(while the execution command is ON). To change the argument, turn OFF the execution command.
Operation error
In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and an error code is stored into SD0.
n1: ON time or the number for the device where the ON time is stored (unit: ms) (BIN 16 bits)
n2: Frequency or the number for the device where the frequency is stored (unit: ms) (BIN 16 bits)
(D): Number of the device to which pulses are output (bits)
Setting
data
Internal device R, ZR J\ U\G Zn Constant
K, H
Others
Bit Word Bit Word
n1 
n2 
(D)
*1
CPU Module Type Name Setting Range for n1 and n2 [ms]
*2
High Performance model QCPU, Process CPU
Universal model QCPU, LCPU
1 to 65535 (0001H to FFFFH)
Error
code
Error details Q00J/
Q00/
Q01
QnH QnPH QnPRH QnU LCPU
4101 The device specified by (D) exceeds the range of the corresponding device. 
Basic
Redundant
Process
High
performance
Universal
LCPU
Command
n2n1 DPWM PW M
n1
n2

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