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5 SEQUENCE INSTRUCTIONS
5.3 Output Instructions
Counter
OUT C
*1 Counter value cannot be set by indirect designation.
See Page 105 Indirect Specification for further information on indirect designation.
*2 Counter value can be set only with a decimal constant (K). Hexadecimal constants (H) and real numbers cannot be used for timer
settings.
• When the operation results up to the OUT instruction change from OFF to ON, 1 is added to the present value (count value)
and the count up status (present value set value), and the contacts respond as follows:
• No count is conducted with the operation results at ON. (There is no need to perform pulse conversion on count input.)
• After the count up status is reached, there is no change in the count value or the contacts until the RST instruction is
executed.
• A negative number (-32768 to -1) cannot be set as the setting value for the timer. If the set value is 0, the processing is
identical to that which takes place for 1.
• Indexing for the counter coil and contact can use only Z0 and Z1. (QnUDVCPU is excluded.) Counter setting value has no
limitation for indexing.
• The number of basic steps of the OUT C instruction is 4.
For counter counting methods, refer to the User's Manual (Function Explanation, Program Fundamentals) for
the CPU module used.
• There is no operation error in the OUT instruction.
(D): Counter number (bits)
Setting value Counter setting value (BIN 16 bits
*1
)
Setting
data
Internal device R, ZR J\ U\G Zn Constant
K
Others
Bit Word Bit Word
(D) (Only C)
Set value (Other
than T, ST,
C)
*2
• A Contact: Continuity
• B Contact: Non-continuity
Basic
Process
High
performance
Redundant
Universal
LCPU
C0
K50
C1
D10
OUT C
Set value
Setting in the range
from 1 to 32767 is valid.
Set value
Counter number (D)
Counter number (D)
Data register value in the
range from 1 to 32767 is valid.
Command
Command
@D0
C0
Indirect designation is
not permitted.
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