7 APPLICATION INSTRUCTIONS
7.3 Shift Instructions
397
7
■SFTBL(P)
• This instruction shifts the n1 bits data in the devices starting from the device specified by (D) to the left by n2 bits.
n1=10, n2=4
• n1 and n2 are specified under the condition that n1 is larger than n2. If the value of n2 is equal to or larger than the value of
n1, the remainder of n2 / n1 (n2 divided by n1) is used for a shift. However, if the remainder of n2 / n1 is 0, the instruction
will be not processed.
• This instruction specifies n1 ranged from 1 to 64.
• Bits starting from the lowest bit to n2th bit are filled with 0s. If the value of n2 is larger than the value of n1, the remainder of
n2 / n1 will be 0.
• If the value specified by n1 or n2 is 0, the instruction will be not processed.
• In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and an error code is stored into SD0.
Error
code
Error details Q00J/
Q00/
Q01
QnH QnPH QnPRH QnU LCPU
4100 The value specified in n1 is other than 0 to 64.
The value in n2 is negative.
4101 The points specified in n1 exceed those of the device specified in (D).
1
(SM700)
110 1111 0 1
Filled with 0s
+2
+1
D D
+3
D
+4
D
+5
D
n2
+6
D
+7
D
+8
D D
Carry flag
n1
1110 1 0 000
+2
+1
D D
+3
D
+4
D
+5
D
+6
D
+7
D
+8
D D
0
1
+9
D
+9
D
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