12
PC Setup Section 1-1
2. Do not set to “05” to “07.” If set to this value, the CPM1/CPM1A will not op-
erate properly and the RUN PC Setup Error Flag (AR 1302 ON) will not
turn ON.
3. Retention of IOM Hold Bit (SR 25212) Status
If the “IOM Hold Bit Status at Startup” (DM 6601, bits 08 to 11) is set to
“Maintain” with the IOM Hold Bit (SR 25212) turned ON, operation can be
started with the I/O memory (I/O, IR, LR) status just as it was before the
power was turned OFF. (The input area is refreshed at startup, however,
so it is overwritten by the most recently updated input status.)
Retention of Forced Status Hold Bit (SR 25211) Status
If the “Forced Status Hold Bit Status at Startup” (DM 6601, bits 12 to 15) is
set to “Maintain” with the Forced Status Hold Bit (SR 25211) turned ON,
operation can be started with the forced set/reset status just as it was be-
fore the power was turned OFF. (When starting up in RUN Mode, however,
the forced set/reset status is cleared.)
Even if the “IOM Hold Bit Status at Startup” or “Forced Status Hold Bit Sta-
tus at Startup” is set to “Maintain,” the IOM Hold Bit (SR 25212) or Forced
Status Hold Bit (SR 25211) status may be cleared if the power remains
OFF for longer than the backup time of the built-in capacitor. (For details
on the holding time, refer to the CPM1A or CPM1 Operation Manual.) At
this time the I/O memory will also be cleared, so set up the system so that
clearing the I/O memory will not cause problems.
4. The transmission delay is the delay between the previous transmission
and the next transmission.
5. If an out-of-range value is set, the following communications conditions will
result. In that case, reset the value so that it is within the permissible range.
Communications mode: Host Link
Communications format: Standard settings
(1 start bit, 7-bit data; even parity, 2 stop bits,
9,600 bps)
Transmission delay: No
Node number: 00
Host computer
Programmable Controller
Command
Response
Command
Response
Transmission delay time