40 Netra SPARC T4-1B Server Module Service Manual • June 2012
Related Information
■ “Oracle ILOM Properties That Affect POST Behavior” on page 30
■ “Run POST With Maximum Testing” on page 35
■ “Clear POST-Detected Faults” on page 37
on an UE, if VEF = 0 and no fatal error is detected in same cycle.
2011-07-03 18:44:14.983 0:7:2> 1 VEC 56 R/W1C Set to 1
on a CE, if VEF = VEU = 0 and no fatal or UE is detected in same cycle.
2011-07-03 18:44:15.169 0:7:2> 1 DAU 50 R/W1C Set to 1
if the error was a DRAM access UE.
2011-07-03 18:44:15.304 0:7:2> 1 DAC 46 R/W1C Set to 1
if the error was a DRAM access CE.
2011-07-03 18:44:15.440 0:7:2>
2011-07-03 18:44:15.486 0:7:2> DRAM Error Address Reg for Branch
1 = 00000034.8647d2e0
2011-07-03 18:44:15.614 0:7:2> Physical Address is
00000005.d21bc0c0
2011-07-03 18:44:15.715 0:7:2> DRAM Error Location Reg for Branch
1 = 00000000.00000800
2011-07-03 18:44:15.842 0:7:2> DRAM Error Syndrome Reg for Branch
1 = dd1676ac.8c18c045
2011-07-03 18:44:15.967 0:7:2> DRAM Error Retry Reg for Branch 1
= 00000000.00000004
2011-07-03 18:44:16.086 0:7:2> DRAM Error RetrySyndrome 1 Reg for
Branch 1 = a8a5f81e.f6411b5a
2011-07-03 18:44:16.218 0:7:2> DRAM Error Retry Syndrome 2 Reg
for Branch 1 = a8a5f81e.f6411b5a
2011-07-03 18:44:16.351 0:7:2> DRAM Failover Location 0 for
Branch 1 = 00000000.00000000
2011-07-03 18:44:16.475 0:7:2> DRAM Failover Location 1 for
Branch 1 = 00000000.00000000
2011-07-03 18:44:16.604 0:7:2>
2011-07-03 18:44:16.648 0:7:2>ERROR: POST terminated prematurely. Not
all system components tested.
2011-07-03 18:44:16.786 0:7:2>POST: Return to VBSC
2011-07-03 18:44:16.795 0:7:2>ERROR:
2011-07-03 18:44:16.839 0:7:2> POST toplevel status has the following
failures:
2011-07-03 18:44:16.952 0:7:2> Node 0 -------------------------------
2011-07-03 18:44:17.051 0:7:2> /SYS/MB/CMP0/BOB0/CH1/D0
2011-07-03 18:44:17.145 0:7:2> /SYS/MB/CMP0/BOB1/CH1/D0
2011-07-03 18:44:17.241 0:7:2>END_ERROR
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