830D
The
disk drive is conditioned to perform a write operation when the Write Enable
(IWEXR)
line is low. At this time the Write drivers are receptive
to
Write Data pulses. When the Write
Enable line is active and system readiness is satisfied, current flows through the write coil
recording new data and causing
all previous data
to
be
overwritten, i.e., obi iterated.
The read/write coil is a split center-tapped winding. During a write operation, current
flows in alternate halves
of
the read/write coil. Switching
of
write current
in
each
half
leg
causes magnetic flux reversals on the disk surface. It is important to note that when the
disk drive is in the Write mode, the erase coil is also energized. The read/write
gap
is
located in front of the erase gaps
In
both 100 and
200
tpi models. In 100 tpl models the
alternating write flux pattern magnetizes a band approximately
0.1905 mm (0.0075 inch)
wide
on
the surface
of
the disk; in
200
tpi models the magnetized band is approximately
0.10 mm (0.004 inch) wide. The erase gaps, which straddle the read/write gap, erase part
of the write flux pattern
leavtng a recorded band that is approximately
0.1651
mm
(0.0065
inch) wide for 100 tpi models and approximately 0.0914 mm (0.0036 inch) wide for
200
tpi
models. This provides a signal guard-band between adjacent tracks.
4.6.2.1 Write Encoder and Driver
The Write Driver circuitry, shown in Figure 4-4, switches the write current to alternate
halves
of
the read/write head winding. The rate at which the write current is switched is
determined by the write Double Frequency (NLWDFT) signal from the Logic
PCBA.
NLWDFT toggles a flip-flop whose outputs drive two write current control switching
transistors into alternately conducting states. The write current drivers are enabled
by
a
low logic level input on the Write Mode (NLWMXG) line at the Read/Write
PCBA.
4.6.2.2
Erase
Driver
The
Erase
Driver circuit
isa
transistor switch current source that is energized
by
the Erase
Current Enable (NLECEG)
signat"input to the Read/Write PCBA. A low logic level at the
NLECEG
input enables the erase current
to
flow into the read/write head erase windings.
4.6.2.3 Write Current Control
The write current control causes the current level in the read/write calls to change
as
a
function
of
the positioner cylinder address.
In
100 tpi models, for cylinder addresses of 0
through 127, the current level is set at approximately
35
ma;
at cylinder address
128
and
above, the current level is reduced to approximately
27
mao
This current level change is
required because
of
the increased bit density at the innermost tracks
on
the disk surface.
The
lower write current levels reduce the flux pattern fringe effects on neighboring bits. It
is important to note that in
200
tpi models the write currents are slightly different than
those given for
100 tpi models and the lower current level is switched at cylinder
address
256.
4.6.2.4 Write Emergency Monitor
This circuitry continuously monitors the legality
of
conditions within the read/write
system.
If conditions are improper, the write emergency monitor outputs
an
active high
logic level
to
the emergency unload circuitry
on
the Logic PCBA. This causes the disk
drive to execute
an
emergency unload operation. Conditions that would cause a
read
/ write
emergency unload operation are:
(1)
More than one
head
is selected at one time.
(2)
The
current monitor circuitry indicates the presence of a current in either the write
or erase circuits when such a current is not enabled by NLWMXG
and/or
NLECEG.
4-12
j
.
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