The Position
Limit
Monitor
Flip-Flop (U267 zone F4) is cleared by NLLPN'G. This signal
will
be
low and therefore clear the
flip-flop
whenever the Purge Cycle
Flip-Flop
and the
Load-Heads
Flip-Flop
are both zero-set. This
will
occur when the
disk
drive is not
in
a Run
Condition or is in the Run Condition but not yet in a Purge Cycle. This can be seen by
examining the logic shown on sheet 2
of
the Logic PCBA schematic.
When loading heads, the Load Heads Flip-Flop
will
be one-set thus assuring that the
Position
Limit
Monitor
Flip-Flop is released
for
operation. Note that the J
input
of
the
Position
Limit
Monitor
Flip-Flop
is a
continuous
logic one, and therefore any high-to-Iow
transition on the
clock
input
of
the
flip-flop
(U267 pin
6)
will
clock
the
flip-flop
into
a
one-set condition. The
flip-flop
will
remain one-set
until
it
is cleared by NLLPNG going to
the
low-logic
level.
During the loading
of
the heads, the Restore Operation
Flip-Flop
will
be zero-set. As the
positioner moves forward
SPTIG
will
come
to
the high logic level causing
pins
4 and 5
of
U246
(zone F5)
to
be high,
thus
causing a low-to-high transition at U267, pin
6.
As the
heads
load, SPTIG will go from the high level back
to
the
low
level, which
will
cause U267,
pin
6,
to go from a high
to
a low. This
will
one-set the Position
Limit
Monitor
Flip-Flop,
arming the monitor.
When the Position
Limit
Monitor
flip-flop
one-sets, the NAND gate U246 (zone F3) is
enabled at
its
input on pin 12. A positioner
fault
may
be
indicated by either an occurrence
of
Position Transducer Index (SPTIG),
or
by the occurrence
of
Heads Retract, after the
heads have been loaded.
If SPTIG goes high
it
indicates that the positioner has traveled
outside
of
its legal range. This
will
cause U246, pin 2 (zone
E4)
to
go
low
which in turn
will
result in U246, pin
11
(zone E3), going low, thus indicating Position
Limit
Error (NLPLEG).
The other method for detecting a
fault is
if
Heads Retract (SHRXG) goes high. This
will
force U246. pin 1 (zone E4),
to
the low-logic level, and again U246, pin
11
will go low,
indicating Position
Limit
Error (NLPLEG). Either
condition
results in emergency unload.
The success
of
emergency unload
will
depend on the nature
of
the fault which originally
caused the occurrence
of
Position Transducer Index (SPTIG), or Heads Retract (SHRXG).
If a
multiple
Position Transducer Index (SPTIG) occurs during the loading
of
the heads,
this
circuit
will
detect that occurrence and immediately commence
an
emergency unload
before
allowing completion
of
loading the heads. Likewise,
this
circuit
wi
II
detect certain
faults in the position transducer.
Refer to the
circuitry
contained in zones H12 and 13. The
most
Significant
bit
of
the
Demand Address Register
for
either 100-track per inch
or
200-track per inch machines can
be
selected by the
jumper
arrangement
W11
or W12, as appropriate. This Demand Address
Most Significant (LDAMG)
Signal is fed
to
the Read/Write PCBA where
it
is used
for
switching the write current to the particular value utilized
for
high order cylinder
addresses.
5.5.4 SHEET 5
(SCHEMATIC NO. 102830)
Sheet 5
of
the Logic PCBA schematic contains the Sector Electronics portion
of
the 03000
logic. Refer
to
the functional discussion and
simplified
block diagram contained in
Paragraph 4.7 in
conjunction
with
this
discussion.
The purpose
of
the circuitry contained on sheet 5
of
the schematic is to provide pulses at
the
I/O
interface for electrically subdividing the storage surface
into
sectors.
In
addition
to
the pulses provided, the specific number
of
the sector passing under the
Read
IWrite
heads is also transmitted as a sector count which is used
for
addressing data stored on the
disk. An index
pulse is also provided as
an
output. This provides a signal which is a pulse
occurring once per revolution
of
the disk that can be utilized to define the sector reference.
5-35
6300
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