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PCC D3400 - Page 139

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8300
When the heads are being loaded,
it
is necessary to force the carry to a particular state.
This is
accomplished by the Carry Control on the basis
of
the states from certain
bits
in
the Current Address Counter. U361-6 (zone
010) essentially decodes all one states in the
most
significant
bits
of
the Current Address Counter and forces the carry
to
a specific
state during the
time
that the heads are being loaded. Only during that time
will
the
Current Address Counter have logic ones in the
most
significant
positions
of
the counter.
By forcing the carry during the loading
of
the heads, a least
significant
velocity reference
level is specified by
NLAOOG,
such that between the
time
when the Forward Slow Mode
operation is ended and the Position Mode is commenced the positioner servo is operated
as a true velocity servo with a least
significant
velocity reference.
For
200
tpi operation the three
most
significant
bits
of
the current address counter are
buffered by
U441
and
U443
and sent to the Temperature Compensation PCBA via J114.
The Error Check Log ic (zone F,
G,
H-3,
4,
5)
performs
two
types
of
checks concerned
with
the operation
of
the positioner. The
first
check determines
if
the positioner has completed
a seek within the maximum
allowable time. This is done by the Seek Time Error Check
Counter
U287
(zone G4). This is a gross type
of
check
to
determine that the
positioner
has
not become stalled due to a fault. While each and every seek is checked by the
circuit
it
does not verify that a specific distance moved was accomplished
within
the specific
time
associated
with
that length
of
seek. Rather,
it
determines that the positioner has not
become stalled while attempting a seek.
The Seek Time Error Check Counter is enabled
to
count the LC17F
clock
from the
clock
countdown whenever the Busy Time
Flip-Flop
is one-set. This is a result of
Not
Busy Time
(NLBTFF) being fed to the input
of
U246, pin 9 (zone G5).
If the counter has not counted up to the state where the carry-out has occurred, then the
inputs at pins 9 and
10
of
U246
will
be
high when the positioner is not busy. This causes
U246-8 to go low, loading all zeros
into
the Seek Time Error Check Counter U287.
When all-zeros are loaded
into
the counter and the load input is held at the low level, the
counter is locked up and cannot count the LC17F clock. However, when the positioner
goes busy, NLBTFF goes low causing U246-8 to go high, releasing the counter and
allowing it to count LC17F clocks.
If the Busy Time ends before the counter has counted up to the carry-out condition, then
the seek has been completed well
within
the maximum allowable time; the Busy Flip-Flop
will again load zeros into the counter before the carry-out has occurred. Should the
positioner become stalled, or other faults develop which cause the Busy signal to exist
for
a
sufficient
period
of
time for the counter to count to the carry-out condition, then the
carry-out (U287, pin 12) will go low indicating a Seek Time Error (NLSTEG). This results
in
execution
of
an
Emergency Unload.
Notice that the Restore Operation Flip-Flop (LROFF) is fed
to
the clear
input
of
the Seek
Time Error Check Counter. This signal clears the counter during the time
of
a Restore
Operation.
It is not desirable
to
check Seek Time during a Restore operation.
The other check performed by the Error Check Logic is to determine that the positioner has
not traveled outside of the legal range of travel. This is performed by the Position
Limit
Monitor
circuitry shown
in
zone
F4.
This circuit generates a Position
Limit
Error signal
(NLPLEG)
if
the positioner exceeds the normal range
of
travel. This check is performed
only during the time that the heads are loaded onto the disk.
5-34

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