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Renesas RH850/F1Kx Series Hardware Design Guide

Renesas RH850/F1Kx Series
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RH850/F1Kx, RH850/F1K Series Hardware Design Guide
R01AN3841ED0110 Rev. 1.10 Page 75 of 108
August 8, 2019
4.3.5 Port and Pin Behavior during Low Power Mode
During the low power modes, different states apply for the ports and pins of the RH850/F1Kx, RH850/F1K series. The
states depend on the chosen low-power mode and may not have the same behavior for pins used as GPIO and used as
alternative functions.
The following overview provides a summary of the pin behavior during low-power modes:
Table 61: Port and pin behavior during low power mode
Always-On area (AWO area)
Isolated area (ISO area)
Pins used as
GPIO
Pins used as
alternative
functions
Pins used as
GPIO
Pins used as
alternative
functions
RUN Mode (HALT State)
Functional
Functional
Functional
Functional
STOP Mode
Kept
Functional
Kept
Functional
DeepSTOP Mode
Kept
Functional
I/O hold
I/O hold
Cyclic RUN Mode
Functional
Functional
Functional
Functional
Cyclic STOP Mode
Kept
Functional
Kept
Functional
Functional
Functional
Kept
State before entering the mode is kept
I/O hold
State before entering the mode is kept (with I/O hold).
Internal logics are initialized after wake-up.
I/O hold function for Isolated area (ISO area)
During the DeepSTOP mode, the state of the pins on the Isolated area (ISO area)
can be held automatically. Thus, its input and/or output remain in the same state as
before entering I/O buffer hold state. No external or internal signal can change its
state until the I/O buffer hold state is terminated.
The I/O buffers in DeepSTOP mode are changing into I/O buffer hold state by
default.
After the wake-up from DeepSTOP mode the I/O buffer hold state is terminated in the
following steps:
o 1. Re-configure the peripheral or port function
o 2. Release I/O hold state by setting IOHOLD.IOHOLD = 0

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Renesas RH850/F1Kx Series Specifications

General IconGeneral
BrandRenesas
ModelRH850/F1Kx Series
CategoryComputer Hardware
LanguageEnglish

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