RH850/F1Kx, RH850/F1K Series Hardware Design Guide
R01AN3841ED0110 Rev. 1.10 Page 94 of 108
August 8, 2019
The maximum sink current of the RESET terminal of the E1/E2 emulator is 2mA. The
external pull-up circuit of the
RESET pin has to be considered based on the applications
requirement. When an external RESET component is used, the pull-up resistor value has to be
selected appropriately.
Design the circuit in the way that the FLMD1 pin must be at the low level during serial
programming. During programming (using the RFP), it outputs a low level on FPMD1 to place
the device in the serial programming mode.
If necessary, connect FPMD1 and FLMD1.
When the LPD (1 pin) mode is used, the port of the JP0 port group is automatically switched to the debug interface
mode. The remaining pins of JP0 can be used as general-purpose I/O pin including its alternate function.
• JP0_0: LPDIO input/output
• JP0_1: General-purpose I/O
• JP0_2: General-purpose I/O
• JP0_3: General-purpose I/O
• JP0_4: General-purpose I/O
• JP0_5: General-purpose I/O
• JP0_6: General-purpose I/O (depending on device)
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