Rohde & Schwarz SMC100A - Status Reporting System

R&S SMC100A Status Reporting System
1411.4060.32 5.23 E-1
Event Status Register (ESE)
1. Set the OPC mask bit (bit no. 0) in the ESE: *ESE 1
2. Send the overlapped command without *OPC, *OPC? or *WAI
3. Poll the operation complete state periodically (by means of a timer) using the sequence: *OPC;
*ESR?
A return value (LSB) of 1 indicates that the overlapped command has finished.
*OPC? with short timeout
1. Send the overlapped command without *OPC, *OPC? or *WAI
2. Poll the operation complete state periodically (by means of a timer) using the sequence: <short
timeout>; *OPC?
A return value (LSB) of 1 indicates that the overlapped command has finished. In case of a timeout, the
operation is ongoing.
3. Reset timeout to former value
4. Clear the error queue with SYStem:ERRor? to remove the "-410, Query interrupted" entries.
Status Reporting System
The status reporting system stores information on errors which have occurred. This information is
stored in theerror queue. The error queue can be queried via IEC/IEEE bus or via the Ethernet.
The information is of a hierarchical structure. The register status byte (STB) defined in IEEE 488.2 and
its associated mask register service request enable (SRE) form the uppermost level. The STB receives
its information from the standard event status register (ESR) which is also defined in IEEE 488.2 with
the associated mask register standard event status enable (ESE).
The IST flag ("I
ndividual STatus") and the parallel poll enable register (PPE) allocated to it are also part
of the status reporting system. The IST flag, like the SRQ, combines the entire instrument status in a
single bit. The PPE fulfills an analog function for the IST flag as the SRE for the service request.
The output buffer contains the messages the instrument returns to the controller. It is not part of the
status reporting system but determines the value of the MAV bit in the STB.