SBC PCD2.M5 Series - PCD2.M5_ Cpus

Hardware Manual for the PCD2.M5 Series│Document 26/856; Version EN 12│2014-07-24
Saia-Burgess Controls AG
PCD2 CPUs
PCD2.M5_ Classic CPUs and expansion housings
3-6
3
required.
3.4 PCD2.M5_CPUs
Differences between base
units PCD2.M
5440 5540
General features
I/O bus extension yes
Number of inputs/outputs or
I/O module sockets
up to 1023
1)2)
64
Processor(Motorola) CF5272/66MHz
Processing time
Bit instruction:
Word instruction:
0.3...1.5 µs
3)
0.9 µs
3)
Firmware,rmwareupdate
(rmwarememorysolderedon)
Downloadable from the PG5 environment
Programmable with PG5 from 1.4.200
Main memory for user program,
text,DB(RAM)
1 MB
Backup memory onboard
(Flash)
1MByteashcard(optional)
Hardware clock
Accuracy
Yes, better than 1 min/month
Data backup Renata CR2032 lithium battery, 1...3 years
4)
User inputs
Max. input frequency
4
1 kHz
5)
User outputs 2
Interfaces
Programming interface USB
6)
Optional serial data interface
Port 1, 2
2 x
RS-232, RS-422/485 or TTY current loop 20 mA
Port0(PGU)alsoasRS-232
interface(D-Sub)orRS-485
(X5terminalblock),upto
115 kbit/s
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