Hardware Manual for the PCD2.M5 Series│Document 26/856; Version EN 12│2014-07-24
Saia-Burgess Controls AG
PCD2.H150
Input/output (I/O) modules
6-97
6
6.16 SSI encoder module
PCD2.H150
SSI interface module
I/O modules and I/O terminal blocks may only be plugged in and removed when the
PCD and the external +24 V are disconnected from the power supply.
6.16.1 PCD2.H150, SSI interface module for absolute encoder
Application
ThePCD2.H150moduleisaninterfacemodulefortheSSIstandard.(SSI=
SynchronousSerialInterface).TheSSIstandardisusedwithmostabsolute
encoders.DetailsofSSIspecicationscanbeobtainedfromtheSTEGMANN
company’sbrochure:“SSI-TechnicalInformation”.
The hardware consists of an RS-422 port for the SSI interface and 4 general-purpose
digitaloutputs.FunctionalityisprovidedbyanFPGA(eldprogrammablegatearray).
Technical data
Resolution: congurablefor8..29databitsand0..2controlbits
Clock frequency: congurablefor100kHz,200kHz,300kHz
and500kHz(inputlterdesignedfor500kHz)
Frequencyhastobeselected
depending on cable length:
Cablelength Frequency
< 50 m max. 500 kHz
< 100 m max. 300 kHz
< 200 m max. 200 kHz
< 400 m max. 100 kHz
Data code: congurable-Grayorbinary
Read mode: Normal(singleread).Ringmode:‘doublereadandcom-
pare’(notallencoderssupportthisfunction)
Offset position: AnoffsetcanbedenedwheninitializingthePCD2.H150.
ThedenedoffsetisalwayssubtractedintheFBs.The
‘SetZero’commandalsousesthisoffsetregister.
Execution time: typically 1.5 ms for reading the SSI value
Cable break detection: detectedwiththeFB‘timeout’(10ms)
Flags forcablebreak,encoderfaultorincorrectaddressing)
‘fPar_Err’,(ifawringFBparameterissent)
‘fRing_err’(ifcompareerrorin‘doubleread’)
SSI interface
1 input for SSI data RS-422, electrically isolated
1 output for SSI clock RS-422, electrically connected,
as the encoder input is normally isolated
Digital outputs
Number of outputs:
Terminal 4 = O12:
Terminal 5 = O13:
Terminal 6 = O14:
Terminal 7 = O15:
4
Speed high
Speed low
Dir + positive direction
Dir - negative