SBC PCD2.M5 Series - Order Details

Hardware Manual for the PCD2.M5 Series│Document 26/856; Version EN 12│2014-07-24
Saia-Burgess Controls AG
MemorymodulePCD3.R600forashcards(FCs)
PCD2.M5_ Classic CPUs and expansion housings
3-49
3
I/O bus functions
Some states are detected by the user program.
I/O bus
offset
Write Read Meaning
+0 BCDswitchsettingBit0(lsb) Position(non-inverted)ofBCD
switch
+1 do not use BCD switch setting Bit 1
+2 do not use BCD switch setting Bit 2
+3 do not use BCDswitchsettingBit3(msb)
+4 do not use
+5 do not use
+6 do not use 0 = Card present 1 = card removed
+7 do not use SD write-protect switch 1 = SD blocked/removed
0 = MMC or SD released
3.13.7 Order details
Order code Description Weight
PCD2.R6000 BasemoduleforSDashmemorycards,forI/O
slot0…3(ashcardnotincluded)
60 g
PCD7.R-SD256 SDashmemorycard256MB 2 g
PCD7.R-SD512 SDashmemorycard512MB 2 g
PCD7.R-SD1024 SDashmemorycard1,024MB 2 g