SBC PCD2.M5 Series - Page 208

Hardware Manual for the PCD2.M5 Series│Document 26/856; Version EN 12│2014-07-24
Saia-Burgess Controls AG
PCD2.H150
Input/output (I/O) modules
6-99
6
Block diagram
CLK
/CLK
D
/D
A 12
A 13
User PROM
FPGA
(Field Programmable
Gate Array)
PCD Bus
Input filter and adaptation 24V to 5V
Output amplifier 5 .to. 32 V
DC (Uext)
Clock
/Clock
Data
/Data
Output 12
A 14
A 15
Output 13
Output 14
Output 15
Forfurtherdetails,pleaserefertomanual26/761"PCD2.H150-SSIinterfaceforabsolute
encoder".
Watchdog: This module cannot be used on the base address 240, because it would
interact with the watchdog, and would cause a malfunction.
Fordetails,pleaserefertothe"Watchdog"section,whichdescribesthecorrectuse
of the watchdog in conjunction with PCD2 components.