Sel 551 - Page 103

4.17
Date Code 20110408 Instruction Manual SEL-551 Relay
Setting the Relay
Relay Word Bit Setting Reference Information
10 TRIP Trip logic output asserted (see Figure 3.13) Output contact assignment
CLOSE Close logic output asserted (see Figure 3.14)
51P1R First phase time-overcurrent element reset (see Figure 3.9)Testing
51P2R Second phase time-overcurrent element reset (see Figure 3.9)
51N1R Neutral ground time-overcurrent element reset (see Figure 3.10)
51G1R Residual ground time-overcurrent element reset (see Figure 3.11)
51Q1R First negative-sequence time-overcurrent element reset
(see Figure 3.12)
51Q2R Second negative-sequence time-overcurrent element reset
(see Figure 3.12)
11 SV5T SEL
OGIC Variable timer output asserted (see Figure 3.21) Timing
SV6T SEL
OGIC Variable timer output asserted (see Figure 3.21)
SV7T SEL
OGIC Variable timer output asserted (see Figure 3.21)
SV8T SEL
OGIC Variable timer output asserted (see Figure 3.21)
SV9T SEL
OGIC Variable timer output asserted (see Figure 3.21)
SV10T SEL
OGIC Variable timer output asserted (see Figure 3.21)
SV11T SEL
OGIC Variable timer output asserted (see Figure 3.21)
SV12T SEL
OGIC Variable timer output asserted (see Figure 3.21)
12 SV13T SEL
OGIC Variable timer output asserted (see Figure 3.21)
SV14T SEL
OGIC Variable timer output asserted (see Figure 3.21)
ALARM
c
ALARM output contact indicating that relay failed or PULSE
ALARM executed (see Figure 3.23)
Indication
OUT1
c
Output contact OUT1 asserted (see Figure 3.23)
OUT2
c
Output contact OUT2 asserted (see Figure 3.23)
OUT3
c
Output contact OUT3 asserted (see Figure 3.23)
OUT4
c
Output contact OUT4 asserted (see Figure 3.23)
13 PDEM Phase demand current above pickup setting PDEMP
(see Figure 3.26)
NDEM Neutral ground demand current above pickup setting NDEMP
(see Figure 3.26)
GDEM Residual ground demand current above pickup setting GDEMP
(see Figure 3.26)
QDEM Negative-sequence demand current above pickup setting QDEMP
(see Figure 3.26)
TRGTR Target Rest. TRGTR pulses to logical 1 for one processing interval
when the TAR R (Target Reset) serial port command is executed.
TRGTR asserts to logical 1 for as long as the {TARGET RESET}
pushbutton is pressed (see Figure 3.13).
Control
a
IMPORTANT: See Appendix F: Setting Negative-Sequence Overcurrent Elements for special instructions on setting negative-sequence
overcurrent elements.
b
The Open Command (Relay Word Bit OC) and Close Command (Relay Word Bit CC) are already embedded in the Trip Logic (see Figure 3.13)
and Close Logic (see Figure 3.14), respectively. Thus, they are likely not used in SEL
OGIC control equations. They are in the Relay Word for
embedded event report information functions (see Tab le 7 . 3).
c
Output contacts can be a or b type output contacts (see Figure 2.15 and Figure 3.23).
Ta b le 4 . 6 Re la y W o rd B i t D e f i n i t io n s (Sheet 4 of 4)
Row Bit Definition
Primary
Application