Sun Microelectronics
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7. UltraSPARC External Interfaces
7.4.3.4 Arbitration Timing
Figures 7-12 through 7-18 illustrate the arbitration protocol timing. They also
show how SYSADDR ownership changes from requestor to requestor.
The figures show the minimum arbitration latencies, which are as follows:
• 0 cycles if UltraSPARC or SC is CURRENT DRIVER (FIGURE 7-11)
• 1 cycle if UltraSPARC is the LAST PORT DRIVER (Figure 7-12)
• 2 cycles if not the LAST PORT DRIVER (Figure 7-13)
• 4 cycles if the CURRENT DRIVER must be forced off (Figure 7-14)
Figure 7-12 shows the timing in a uniprocessor system, with the UltraSPARC
driving back-to-back packets in the absence of a request from SC.
Figure 7-11 Uniprocessor: Back-to-Back Packets—No SC Request
Figure 7-12 shows the timing for a single UltraSPARC driving back-to-back pack-
ets in the absence of another request.
Figure 7-12 Arbitration: Back-to-Back Packets—No Other Requests
Req<0>
SYSADDR
Addr_Valid<0>
Cycle 0 Cycle 1 Cycle 0 Cycle 1
0000
0
LAST PORT DRIVER
Req<0>
Req<1>
SYSADDR
Addr_Valid<0>
Addr_Valid<1>
Cycle 0 Cycle 1 Cycle 0 Cycle 1
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