Sun Microelectronics
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Address Spaces, ASIs, ASRs, and Traps 8
8.1 Overview
A SPARC-V9 processor provides an Address Space Identifier (ASI) with every ad-
dress sent to memory. The ASI is used to distinguish between different address
spaces, provide an attribute that is unique to an address space, and to map inter-
nal control and diagnostics registers within a processor.
SPARC-V9 also has extended the limit of virtual addresses from 32 to 64 bits for
each address spaces. SPARC-V9 continues to support 32-bit addressing by mask-
ing the upper 32-bits of the 64-bit address to zero when the address mask (AM)
bit in the PSTATE register is set.
Both big- and little-endian byte orderings are supported in UltraSPARC. The de-
fault data access byte ordering after a Power-On Reset is big-endian. Instruction
fetches are always big-endian.
8.2 Physical Address Space
The UltraSPARC memory management hardware uses a 44-bit virtual address
and an 8-bit ASI to generate a 41-bit physical address. This physical address
space can be accessed using either virtual-to-physical address mapping or the
MMU bypass mode. See Section 6.10, “MMU Bypass Mode,” for details of MMU
bypass mode.
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