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Sun Microsystems UltraSPARC-I - Introduction; Summary; G.1 Introduction

Sun Microsystems UltraSPARC-I
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Sun Microelectronics
351
Differences Between UltraSPARC Models G
G.1 Introduction
This Appendix documents the technical differences between the UltraSPARC
models described in this manual. These models are:
UltraSPARC-I
UltraSPARC-II
G.2 Summary
UltraSPARC-I is the base processor model. UltraSPARC-II supports the following
enhancements:
Reduced gate dimensions (0.35 µ) and faster cycles times (4 ns)
8 Mb and 16 Mb E-Cache sizes
Additional Processor : System clock ratios
Use of reduced cost / increased density E-Cache SRAMs
Support for PREFETCH{A} instructions
Three outstanding Read transactions, instead of only one
Two outstanding Writeback transactions, instead of only one
Ability to programmatically limit the number of outstanding Read and
Writeback transactions
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