Sun Microelectronics
352
UltraSPARC User’s Manual
G.3 References to Model-Specific Information
Table G-1 lists the pages within the UltraSPARC User’s Manual that contain mod-
el-specific information.
Table G-1 UltraSPARC Model-Specific Information
Page I II Description
4 ✓✓Implementation technologies and cycle times
7 ✓✓Number of trap levels
10 ✓✓E-Cache sizes
10 ✓✓E-Cache SRAM modes
10 ✓✓System : Processor clock frequency ratios
36 ✓ Support for the PREFETCH{A} instructions
73 ✓✓Number of bits in E-Cache Tag Address
73 ✓✓Number of bits in E-Cache Data Address
77 ✓✓E-Cache sizes
77 ✓✓Number of read buffer entries
78 ✓✓Number of Writeback buffer entries
79 ✓✓Timing for coherent read hit (1–1–1 Mode)
80 ✓ Timing for coherent read hit (2–2 Mode)
81 ✓✓Timing for coherent write hit to M State line (1–1–1 Mode)
81 ✓ Timing for coherent write hit to M State line (2–2 Mode)
82 ✓✓Timing for coherent write hit with E-to-M State transsition (1–1–1 Mode)
82 ✓✓Timing overlap for tag read / data write for coherent write (1–1–1 Mode)
83 ✓✓Read-to-write bus turnaround penalty (1–1–1 Mode)
96 ✓ Support for the PREFETCH{A} instructions
102 ✓✓Number of outstanding ReadToShare transactions
103 ✓✓Number of outstanding ReadToOwn transactions
104 ✓✓Number of outstanding ReadToDiscard transactions
110 ✓✓Number of outstanding NonCachedRead transactions
110 ✓✓Number of outstanding NonCachedBlockRead transactions
112 ✓✓Worst-Case Delay Between S_REQ and P_REPLY when NDP=1
113 ✓✓Number of outstanding Writeback transactions
126 ✓✓Number of outstanding read transactions
128 ✓ Limited transaction types before Writeback
128 ✓ Limited number of outstanding transactions in a class
128 ✓ Programmatically limiting the number of outstanding transactions in a class
130 ✓ Number of outstanding Writeback / dirty victim read transaactions
130 ✓ Number of outstanding Writeback / dirty victim read transaactions
154 ✓ MCAP field of UPA_CONFIG register
154 ✓ CLK_MODE field of UPA_CONFIG register
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