Sun Microelectronics
152
UltraSPARC User’s Manual
1.
Read-/write-only accesses cause a
data_access_exception
trap if written/read respectively.
2.
8-/16-/32-/64-bit accesses allowed.
3.
LDDA, STDFA or STXA only. Other types of access cause a
data_access_exception
trap.
4
.
LDDFA/STDFA only. Other types of access cause a
data_access_exception
trap.
5
.
Can be used with LDSTUBA, SWAPA, CAS(X)A.
6.
Causes a
data_access_exception
trap if the page being accessed is privileged.
8.3.3 Other UltraSPARC ASI Extensions
8.3.3.1 UPA Port ID Register
The per-processor UPA_PORT_ID Register can be accessed only from the System
Bus as a read-only, noncacheable, slave access at offset 0 of the slave address
space of the processor port.
This register indicates the capability of the CPU module. See Table 10-1, “Ma-
chine State After Reset and in RED_state,” on page 172 for the state of this regis-
ter after reset.
Consult the UltraSPARC-I Data Sheet for the contents of this register’s ID field.
The Bibliography describes how to obtain the data sheet.
DA
16
ASI_FL16_PRIMARY_LITTLE
(ASI_FL16_PL)
—RW
4
Primary address space, one 16-bit
floating point load/store, little
endian
13.6.2
DB
16
ASI_FL16_SECONDARY_LITTLE
(ASI_FL16_SL)
—RW
4
Secondary address space, one 16-
bit floating point load/store, lit-
tle endian
13.6.2
E0
16
ASI_BLK_COMMIT_PRIMARY
(ASI_BLK_COMMIT_P)
—W
1,4
Primary address space, block
store commit operation
13.6.4
E1
16
ASI_BLK_COMMIT_SECONDARY
(ASI_BLK_COMMIT_S)
—W
1,4
Secondary address space, block
store commit operation
13.6.4
F0
16
ASI_BLOCK_PRIMARY (ASI_BLK_P) — RW
4
Primary address space, block
load/store
13.6.4
F1
16
ASI_BLOCK_SECONDARY (ASI_BLK_S) — RW
4
Secondary address space, block
load/store
13.6.4
F8
16
ASI_BLOCK_PRIMARY_LITTLE
(ASI_BLK_PL)
—RW
4
Primary address space, block
load/store, little endian
13.6.4
F9
16
ASI_BLOCK_SECONDARY_LITTLE
(ASI_BLK_SL)
—RW
4
Secondary address space, block
load/store, little endian
13.6.4
Table 8-2 UltraSPARC Extended (non-SPARC-V9) ASIs (Continued)
ASI
Value
ASI Name (Suggested Macro Syntax) VA Access Description Section
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