MicroBlaze Processor Reference Guide 167
UG984 (v2018.2) June 21, 2018 www.xilinx.com
Chapter 3: MicroBlaze Signal Interface Description
M_AXI_IC_ARSNOOP
1
2065 to 2068 std_logic_vector
M_AXI_IC_ARBAR
1
2069 to 2070 std_logic_vector
M_AXI_IC_RREADY 2071 std_logic
M_AXI_IC_RACK
1
2072 std_logic
M_AXI_IC_ACREADY
1
2073 std_logic
M_AXI_IC_CRVALID
1
2074 std_logic
M_AXI_IC_CRRESP
1
2075 to 2079 std_logic_vector
M_AXI_IC_CDVALID
1
2080 std_logic
M_AXI_IC_CDLAST
1
2081 std_logic
M_AXI_DC_AWID 2082 std_logic
M_AXI_DC_AWADDR 2083 to 2146 std_logic_vector
M_AXI_DC_AWLEN 2147 to 2154 std_logic_vector
M_AXI_DC_AWSIZE 2155 to 2157 std_logic_vector
M_AXI_DC_AWBURST 2158 to 2159 std_logic_vector
M_AXI_DC_AWLOCK 2160 std_logic
M_AXI_DC_AWCACHE 2161 to 2164 std_logic_vector
M_AXI_DC_AWPROT 2165 to 2167 std_logic_vector
M_AXI_DC_AWQOS 2168 to 2171 std_logic_vector
M_AXI_DC_AWVALID 2172 std_logic
M_AXI_DC_AWUSER 2172 to 2176 std_logic_vector
M_AXI_DC_AWDOMAIN
1
2177 to 2178 std_logic_vector
M_AXI_DC_AWSNOOP
1
2179 to 2182 std_logic_vector
M_AXI_DC_AWBAR
1
2183 to 2184 std_logic_vector
M_AXI_DC_WDATA 2185 to 2696 std_logic_vector
M_AXI_DC_WSTRB 2697 to 2760 std_logic_vector
M_AXI_DC_WLAST 2761 std_logic
M_AXI_DC_WVALID 2762 std_logic
M_AXI_DC_WUSER 2863 std_logic
M_AXI_DC_BREADY 2764 std_logic
M_AXI_DC_WACK
1
2765 std_logic
M_AXI_DC_ARID 2766 std_logic
M_AXI_DC_ARADDR 2767 to 2830 std_logic_vector
M_AXI_DC_ARLEN 2831 to 2838 std_logic_vector
M_AXI_DC_ARSIZE 2839 to 2841 std_logic_vector
M_AXI_DC_ARBURST 2842 to 2843 std_logic_vector
M_AXI_DC_ARLOCK 2844 std_logic
M_AXI_DC_ARCACHE 2845 to 2848 std_logic_vector
M_AXI_DC_ARPROT 2849 to 2851 std_logic_vector
M_AXI_DC_ARQOS 2852 to 2855 std_logic_vector
Table 3-14: MicroBlaze Lockstep Comparison Signals (Cont’d)
Signal Name Bus Index Range VHDL Type