EasyManua.ls Logo

Xilinx MicroBlaze - Page 224

Xilinx MicroBlaze
316 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
MicroBlaze Processor Reference Guide 225
UG984 (v2018.2) June 21, 2018 www.xilinx.com
Chapter 5: MicroBlaze Instruction Set Architecture
clz
Count Leading Zeros
clz
rD, rA
Count leading zeros in rA
1 0 0 1 0 0 rD rA 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0
0 6 11 16 21
31
Description
This instruction counts the number of leading zeros in register rA starting from the most significant
bit. The result is a number between 0 and 32, stored in register rD.
The result in rD is 32 when rA is 0, and it is 0 if rA is 0xFFFFFFFF.
Pseudocode
n 0
while (rA)[n] = 0
n n + 1
(rD)
n
Registers Altered
•rD
Latency
1 cycle
Note
This instruction is only available when the parameter C_USE_PCMP_INSTR is set to 1.
Send Feedback

Table of Contents

Other manuals for Xilinx MicroBlaze

Related product manuals