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Xilinx MicroBlaze
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MicroBlaze Processor Reference Guide 226
UG984 (v2018.2) June 21, 2018 www.xilinx.com
Chapter 5: MicroBlaze Instruction Set Architecture
cmp
Integer Compare
cmp
rD, rA, rB
compare rB with rA (signed)
cmpu
rD, rA, rB
compare rB with rA (unsigned)
0 0 0 1 0 1 rD rA rB 0 0 0 0 0 0 0 0 0 U 1
0 6 11 16 21
31
Description
The contents of register rA is subtracted from the contents of register rB and the result is placed into
register rD.
The MSB bit of rD is adjusted to shown true relation between rA and rB. If the U bit is set, rA and rB is
considered unsigned values. If the U bit is clear, rA and rB is considered signed values.
Pseudocode
(rD) (rB) + (rA) + 1
(rD)(MSB) (rA) > (rB)
Registers Altered
•rD
Latency
1 cycle
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