MC97F6108A User’s manual 15. USART
UCTRL3 (USART Control 3 Register) FCH
Selects master or slave in SPI or Synchronous mode operation and
controls the direction of XCK pin.
Slave mode operation and XCK is input pin.
Master mode operation and XCK is output pin
Controls the Loop Back mode of USART, for test mode
In Synchronous mode of operation, selects the waveform of XCK output.
XCK is free-running while USART is enabled in synchronous
master mode.
XCK is active while any frame is on transferring.
Controls the functionality of SS pin in master SPI mode.
SS pin is normal GPIO or other primary function
SS output to other slave device
Selects the length of stop bit in Asynchronous or Synchronous mode of
operation.
The ninth bit of data frame in Asynchronous or Synchronous mode of
operation. Write this bit first before loading the UDATA register.
MSB (9
th
bit) to be transmitted is ‘0’
MSB (9
th
bit) to be transmitted is ‘1’
The ninth bit of data frame in Asynchronous or Synchronous mode of
operation. Read this bit first before reading the receive buffer.
MSB (9
th
bit) received is ‘0’
MSB (9
th
bit) received is ‘1’