Abov MC97F6108A - Page 163

MC97F6108A User’s manual 15. USART
163
UCTRL3 (USART Control 3 Register) FCH
7
6
5
4
3
2
1
0
MASTER
LOOPS
DISXCK
SPISS
-
USBS
TX8
RX8
R/W
R/W
R/W
R/W
-
R/W
R/W
R
Initial value: 00H
MASTER
Selects master or slave in SPI or Synchronous mode operation and
controls the direction of XCK pin.
0
Slave mode operation and XCK is input pin.
1
Master mode operation and XCK is output pin
LOOPS
Controls the Loop Back mode of USART, for test mode
0
Normal operation
1
Loop Back mode
DISXCK
In Synchronous mode of operation, selects the waveform of XCK output.
0
XCK is free-running while USART is enabled in synchronous
master mode.
1
XCK is active while any frame is on transferring.
SPISS
Controls the functionality of SS pin in master SPI mode.
0
SS pin is normal GPIO or other primary function
1
SS output to other slave device
USBS
Selects the length of stop bit in Asynchronous or Synchronous mode of
operation.
0
1 Stop bit
1
2 Stop bit
TX8
The ninth bit of data frame in Asynchronous or Synchronous mode of
operation. Write this bit first before loading the UDATA register.
0
MSB (9
th
bit) to be transmitted is ‘0’
1
MSB (9
th
bit) to be transmitted is ‘1’
RX8
The ninth bit of data frame in Asynchronous or Synchronous mode of
operation. Read this bit first before reading the receive buffer.
0
MSB (9
th
bit) received is ‘0’
1
MSB (9
th
bit) received is ‘1’