Abov MC97F6108A User Manual

Contents MC97F6108A User’s manual
4
11.8.2 PPG period when ATPSEL = 2'b00 .................................................................... 105
11.8.3 PPG period when ATPSEL = 2'b01 .................................................................... 106
11.8.4 PPG period when ATPSEL = 2'b1x .................................................................... 107
11.8.5 PPG period when writing .................................................................................... 109
11.8.6 PPG period min/max limitation ........................................................................... 111
11.8.7 PPG off-time max/min limitation ......................................................................... 114
11.9 Register map ................................................................................................................... 116
11.10 Register description ........................................................................................................ 117
12 Analog comparator and OP-AMP .............................................................................................. 125
12.1 Comparator and OP-AMP description............................................................................. 126
12.2 Block diagram .................................................................................................................. 128
12.3 Register description ........................................................................................................ 129
13 Buzzer driver .............................................................................................................................. 136
13.1 Buzzer driver block diagram ............................................................................................ 138
13.2 Register map ................................................................................................................... 138
13.3 Register description ........................................................................................................ 139
14 12-bit AD Converter (ADC) ........................................................................................................ 140
14.1 Conversion timing............................................................................................................ 140
14.2 Block diagram .................................................................................................................. 140
14.3 ADC operation ................................................................................................................. 142
14.4 Register map ................................................................................................................... 143
14.5 Register description ........................................................................................................ 144
15 USART ....................................................................................................................................... 147
15.1 Block diagram .................................................................................................................. 148
15.2 Clock generation ............................................................................................................. 149
15.3 External clock (XCK) ....................................................................................................... 150
15.4 Synchronous mode operation ......................................................................................... 150
15.5 Data format ...................................................................................................................... 151
15.6 Parity bit .......................................................................................................................... 152
15.7 USART transmitter .......................................................................................................... 152
15.7.1 Sending Tx data ................................................................................................. 152
15.7.2 Transmitter flag and interrupt ............................................................................. 152
15.7.3 Parity generator .................................................................................................. 153
15.7.4 Disabling transmitter ........................................................................................... 153
15.8 USART receiver .............................................................................................................. 153
15.8.1 Receiving Rx data .............................................................................................. 153
15.8.2 Receiver flag and interrupt ................................................................................. 154
15.8.3 Parity checker ..................................................................................................... 154
15.8.4 Disabling receiver ............................................................................................... 155
15.8.5 Asynchronous data reception ............................................................................. 155
15.9 SPI mode ......................................................................................................................... 157
15.9.1 SPI clock formats and timing .............................................................................. 157
15.10 Register map ................................................................................................................... 160
15.11 Register description ........................................................................................................ 161
15.12 Baud rate settings (example) .......................................................................................... 166
16 Inter Integrated Circuit (I2C) ...................................................................................................... 168
16.1 Block diagram .................................................................................................................. 168
16.2 I2C bit transfer ................................................................................................................. 169
16.3 Start/ Repeated Start/ Stop ............................................................................................. 169
16.4 Data transfer .................................................................................................................... 170

Abov MC97F6108A Specifications

General

Brand	Abov
Model	MC97F6108A
Category	Microcontrollers
Language	English