Abov MC97F6108A User Manual

MC97F6108A User’s manual List of figures
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List of figures
Figure 1. MC97F6108A Block Diagram ................................................................................................ 14
Figure 2. MC97F6108A 20 SOP Pin Assignment ................................................................................. 15
Figure 3. MC97F6108A 16 SOPN Pin Assignment ............................................................................... 16
Figure 4. General Purpose I/O Port ...................................................................................................... 19
Figure 5. Secondary Function I/O Port ................................................................................................. 20
Figure 6. Analog Input I/O Port ............................................................................................................. 21
Figure 7. Program Memory Map ........................................................................................................... 23
Figure 8. Data Memory Map ................................................................................................................. 24
Figure 9. Lower 128bytes of RAM ........................................................................................................ 25
Figure 10. XDATA Memory Area ........................................................................................................... 26
Figure 11. Interrupt Group Priority Level ............................................................................................... 47
Figure 12. External Interrupt Description .............................................................................................. 48
Figure 13. Comparator Interrupt and Comparator Flag Description ..................................................... 49
Figure 14. Interrupt Controller Block Diagram ...................................................................................... 50
Figure 15. Interrupt Sequence Flow ...................................................................................................... 52
Figure 16. Effective Timing of Interrupt Enable Register ...................................................................... 53
Figure 17. Effective Timing of Interrupt Flag Register........................................................................... 53
Figure 18. Effective Timing of Multi-Interrupt ........................................................................................ 54
Figure 19. Interrupt Response Timing Diagram .................................................................................... 55
Figure 20. Correspondence between Vector Table Address and the Entry Address of ISR ................. 55
Figure 21. Saving/Restore Process Diagram and Sample Source ....................................................... 55
Figure 22. Timing Chart of Interrupt Acceptance and Interrupt Return Instruction ............................... 56
Figure 23. Clock Generator Block Diagram .......................................................................................... 75
Figure 24. Basic Interval Timer Block Diagram ..................................................................................... 77
Figure 25. Watchdog Timer Interrupt Timing Waveform ....................................................................... 79
Figure 26. Watchdog Timer Block Diagram .......................................................................................... 80
Figure 27. 16-bit Timer/Counter Mode of Timer0/1/2/3 ......................................................................... 83
Figure 28. 16-bit Capture Mode of Timer0/1/2/3 ................................................................................... 84
Figure 29. 16-bit PWM Mode of Timer0/1/2/3 ....................................................................................... 86
Figure 30. 16-bit PWM Example at 16MHz ........................................................................................... 86
Figure 31. 16-bit PWM Example at 16MHz (Period=Duty) ................................................................... 87
Figure 32. PPG Block Diagram ............................................................................................................. 95
Figure 33. PPG Start and One Shot Pulse ........................................................................................... 97
Figure 34. PPG Period/Duty Write ........................................................................................................ 98
Figure 35. PPG Period/Duty Load to Compare Registers .................................................................... 98
Figure 36. Capture Mode ...................................................................................................................... 99
Figure 37. Disable PPG Output by Comparator 1 .............................................................................. 100
Figure 38. Disable PPG Output by Comparator 1 (C1_FLAG) ........................................................... 100
Figure 39. Disable PPG Output Block Diagram by Comparator 3 ...................................................... 101
Figure 40. Disable PPG Output by Comparator 3 (C3_FLAG) ........................................................... 101
Figure 41. PPG Period Limitation ....................................................................................................... 102
Figure 42. Auto Period Mode Block Diagram ...................................................................................... 103
Figure 43. Period Decrement Block Diagram in Auto Period Mode ................................................... 104
Figure 44. Period Decrement in Auto Period Mode ............................................................................ 104
Figure 45. Auto Period Mode Block Diagram (ATPSEL = 2'b00) ....................................................... 105
Figure 46. Auto Period Mode (ATPSEL = 2'b00) ................................................................................ 105
Figure 47. Auto Period Mode Block Diagram (ATPSEL = 2'b01) ....................................................... 106
Figure 48. Auto Period Mode (ATPSEL = 2'b01) ................................................................................ 106

Abov MC97F6108A Specifications

General

Brand	Abov
Model	MC97F6108A
Category	Microcontrollers
Language	English