Clock ConfigurationClock Configuration
FECFEC
Timing sourceTiming source
Select a source to synchronize all Ethernet transmitters to.
The possible sources are:
InternalInternal
ExternalExternal
GPSGPS
ReceivedReceived
IEEE 1588v2IEEE 1588v2
IEEE 1588v2IEEE 1588v2 appears when the interface type is set to ElectricalElectrical, SFPSFP, or SFP+SFP+.
Sync PortSync Port
This item appears when Interface Type is set to SFP28SFP28 or QSFP28QSFP28. Selects the
output of Sync Clock Output connector on the module panel.
OffOff: does not output the clock.
1/81/8: outputs 1/8 divided clock of the data synchronized clock (approximately
3.222 GHz).
1/161/16: outputs 1/16 divided clock of the data synchronized clock (approximately
1.611 GHz).
Block Diagram of Tx Part (QSFP28)
FEC enableFEC enable
This setting appears when Interface Type is set to SFP28SFP28, QSFP28QSFP28, or QSFP-DDQSFP-DD.
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