baxter Flo-Gard 6301 - Theory of Operation - System Components

07-19-B1-729 FLO-GARD 6301 DUAL CHANNEL VOLUMETRIC INFUSION PUMP SERVICE MANUAL 12-3
Theory of Operation CPU System
When communication between the CPUs cannot occur, both CPUs stop the
pumps with visual and audible alarms.
Should both CPUs fail at the same time, this watchdog function does not
work. The alarm control circuit is provided as a backup watchdog function.
See Figure 13-12. Alarm signals (ALARM, ALARMS) from each CPU are
the inputs to the alarm control circuit.
When both CPUs are functioning normally, the signals change their state
periodically. The software to control the signals is divided into several parts
and located in different portions of the main program. The state changes of
the signals are considered normal only when all the individual parts of the
program are executed according to an expected sequence.
When either or both signals fail, the alarm control circuit is triggered and
stops the pump with visual and audible alarms.
The accompanying audible tone whenever either watchdog function is
activated is continuous rather than intermittent.
I/O Controllers
See Figure 13-21 (PPI Block #1) and Figure 13-22 (PPI Block #2) . The I/O
controller, U601, performs the following functions: activating backlight,
addressing the keyboard and scanning the
ON-OFF/CHARGE key, PANEL
LOCK switch and LCD drivers, and writing display data from the master
CPU into the display drivers.
The other I/O controller, U602, performs the following functions: controlling
the air and occlusion sensors, and activating all LEDs and icons except
ALARM and OPTIONS LEDs and key beep. It also transfers the slide clamp
sensor signals to the master CPU.
Multiplexer
See Figure 13-23. The occlusion sensing block contains the multiplexer,
U851, which selects one of the four occlusion sensor outputs in accordance
with the address signals from an I/O controller, and sends it to the master
CPU.
Universal Pulse Processor
See Figure 13-11. The universal pulse processor (UPP) is controlled by the
master CPU and converts the following analog signals into digital signals: air
sensor outputs, tube misloading sensor outputs, battery voltages, motor
currents and the voltage of the CPUs. The digital signals are periodically read
by the master CPU.