GEFRAN-SIEI ARTDrive Vector V2 Series - Page 261

Index
MENUMENU
MENUMENU
MENU [Unit] Access Default Min/Max Format Reg.Mode Level Ipa
Parameter Name
Description
ARTDrive V2 series - Instruction Manual Chapter 6 Parameter • 261
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 ALARM CFG / Alarms status
NOTE! Menu accessible with Access Level = FULL
The alarm state can be reported via three Words. Each bit determines an alarm state.
It is therefore possible to determine the state of 48 alarms. Each single bit can be
controlled if the corresponding bit of a specific mask is set with 1, otherwise their setting
is always 0.
When an alarm becomes active, the word corresponding bit is set with 1.
Its setting remains equal to 1 till the alarm becomes inactive and the “State Machine or
Sequencer” is not in an alarm condition. If the state of a single alarm has to be controlled
via an output, then only the mask needed bit has to be set with 1.
If the state of several alarms has to be controlled via an output, then the mask
corresponding bits have to be set with 1.
The alarms have to be controlled by the Word itself.
I.e.: the state of the External fault alarm has to be read.
Mask W1 S1 = 0x0100 => 0000 0001 0000 0000
Mask W2 S1 = 0x0000 => 0000 0000 0000 0000
Mask W3 S1 = 0x0000 => 0000 0000 0000 0000
DO 0 src = Select ipa Alm W1 S1.
The state of the Undervoltage and Overvoltage alarm has to be read.
Mask W1 S1 = 0x0100 => 0000 0000 0000 0110
Mask W2 S1 = 0x0000 => 0000 0000 0000 0000
Mask W3 S1 = 0x0000 => 0000 0000 0000 0000
DO 0 src = Select ipa Alm W1 S1.
The state of the External fault and F_R_C alarm has to be read.
Mask W1 S1 = 0x0100 => 0000 0001 0000 0000
Mask W2 S1 = 0x0000 => 0000 0000 1000 0000
DO 0 src = Select ipa Alm W1 S1.
DO 1 src = Select ipa Alm W2 S1.
See alarm list below.
L22 ALARM CFG / AL status
Alarm status configuration:
L22.00 Mask W1 S1 N/A RWS 0XFFF 0 -1 DP V-F-S-B Full 9610
L22.01 Mask W2 S1 N/A RWS 0XFFF 0 -1 DP V-F-S-B Full 9611
L22.02 Mask W3 S1 N/A RWS 0XFFF 0 -1 DP V-F-S-B Full 9612