Intel Core 2 Duo Processor User Manual

Development Board Features
Development Kit User’s Manual 37
3.6.21 Clocks
The system clocks and spread spectrum clocks are provided by the CK505D (EU6H1)
clock synthesizer.
The FSB frequency is determined from decoding the processor BSEL settings. The
BSEL settings can be manually changed via jumpers J1G5, J1G3, and J1G1 (Refer to
Table 18).
The devel
opment board also supports PCIE CLKREQ through the DB800 SRC clock
buffer (U7C2). In addition this CRB also supports one dual 1x8 PCI fan-out buffer
(U7E4).
3.6.22 Real Time Clock
An on-board battery at BT5H1 maintains power to the real time clock (RTC) when in a
mechanical off state. A CR2032 battery is installed on the development board.
3.6.23 Thermal Monitoring
The processor has a thermal diode for temperature monitoring (the thermal sensor is
located at U3B3). The SMC throttles the processor if it becomes hot. If the
temperature of the processor rises too high, the SMC alternately blinks the CAPS lock
LED (located at CR9G2) and NUM lock LED (located at CR9G1) on the board, and the
board shuts down.
The development board supports PWM based FAN speed control. As part of the
thermal measurement, speed of the fan is varied based on the temperature
measurement. 3-pin fan headers J2B3 and J3C2 are provided to support FAN Tacho
output measurement for CPU and GMCH respectively.

Intel Core 2 Duo Processor Specifications

General

Number of Cores	2
Manufacturing Process	65nm or 45nm (depending on model)
Execute Disable Bit	Yes
Enhanced Intel SpeedStep Technology	Yes
L2 Cache	2MB, 4MB, or 6MB (depending on model)
Front Side Bus	1066 MHz
Thermal Design Power (TDP)	35W - 65W (depending on model)
Socket Type	LGA775
Clock Speed	1.6 GHz - 3.33 GHz (depending on model)
Instruction Set	x86, x86-64
Virtualization Technology	Yes (depending on model)
Architecture	Intel Core Microarchitecture