Appendix
576
4.7 Status Model
This section describes the structure of the SCPI status system used by the
81150A / 81160A. The status system records various conditions and states
of the instrument in several register groups as shown on the following
pages. Each of the register groups is made up of several low level registers
called Condition registers, Event registers, and Enable registers which
control the action of specific bits within the register group.
These groups are explained below:
What is a Condition
Register?
A condition register continuously monitors the state of the instrument. The
bits in the condition register are updated in real time and the bits are not
latched or buffered. This is a read-only register and bits are not cleared
when you read the register. A query of a condition register returns a decimal
value which corresponds to the binary-weighted sum of all bits set in that
register.
What is an Event
Register?
An event register latches the various events from changes in the condition
register. There is no buffering in this register; while an event bit is set,
subsequent events corresponding to that bit are ignored. This is a read only
register. Once a bit is set, it remains set until cleared by query command
(such as STAT:QUES:EVEN?) or a *CLS (clear status) command. A
query of this register returns a decimal value which corresponds to the
binary-weighted sum of all bits set in that register.
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