4 FUNCTIONS
4.2 Cyclic Transmission
33
4
Setting method
The link refresh is assigned in "Refresh Settings" under "Basic Settings". ( Page 133 Refresh settings)
Latched devices of the FX5 CPU module
If data in latched devices of the FX5 CPU module are cleared to zero on a program when the FX5 CPU module is powered off
and on or reset, the data may be output without being cleared to zero, depending on the timing of the cyclic data transfer
processing and link refresh. To prevent data in latched devices from being output, execute the following methods.
*1 For the initial device value setting of the FX5 CPU module, refer to the following.
MELSEC iQ-F FX5 User's Manual (Application)
FX5 CPU module device How to disable the device data
Latch relay (L), file register (R) Use the device initial value of the FX5 CPU module to clear the device to zero.
*1
FX5 CPU module device within the latch
range
Delete all the latch range settings specified in "Latch Interval Operation Setting" under "Device Latch Interval
Setting" in "Memory/Device Setting" of "CPU Parameter".
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