Mitsubishi Electric MELSEC-Q/L - Page 1023

APPENDICES
Appendix 1 Operation Processing Time
1021
A
For the instructions for which a rising edge instruction (P) is not described, the processing time is the same
as an ON execution instruction.
(Example) WORDP instruction, TOP instruction etc.
Multiple
CPU high-
speed
transmission
dedicated
instruction
D.DDWR n (S1) (S2)
(D1) (D2)
Writing Devices to
Another CPU
n=1 34.000 82.000 34.000 82.000 34.000 82.000
n=16 37.000 84.000 37.000 84.000 37.000 84.000
n=96 52.000 98.000 52.000 98.000 52.000 98.000
DP.DDWR n (S1) (S2)
(D1) (D2)
n=1 34.000 82.000 34.000 82.000 34.000 82.000
n=16 37.000 84.000 37.000 84.000 37.000 84.000
n=96 52.000 98.000 52.000 98.000 52.000 98.000
D.DDRD n (S1) (S2)
(D1) (D2)
Reads devices from
another CPU.
n=1 34.000 81.000 34.000 81.000 34.000 81.000
n=16 34.000 81.000 34.000 81.000 34.000 81.000
n=96 34.000 81.000 34.000 81.000 34.000 81.000
DP.DDRD n (S1) (S2)
(D1) (D2)
n=1 34.000 81.000 34.000 81.000 34.000 81.000
n=16 34.000 81.000 34.000 81.000 34.000 81.000
n=96 34.000 81.000 34.000 81.000 34.000 81.000
Category Instruction Condition (device) Processing time (s)
Q03UDVCPU Q04UDVCPU Q06UDVCPU,
Q13UDVCPU,
Q26UDVCPU
Min. Max. Min. Max. Min. Max.