7 APPLICATION INSTRUCTIONS
7.10 Debugging and Failure Diagnosis Instructions
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7
• The device numbers indicated at check conditions (X2 and X8 in the figure below) will assume index modification values for
the individual device numbers (with the exception of annunciators (F)) described in the ladder patterns.
X10 within the dotted lines in the figure below would be as follows:
When the check condition corresponds to X2, the processing is performed by X12.
When the check condition corresponds to X8, the processing is performed by X18.
However, the order in which failure detection is executed differs depending on whether SM710 is ON or OFF.
• If SM710 is OFF, checks will be conducted of coil numbers 1 through the end for each contact successively.
• If SM710 is ON, checks will be conducted of contact numbers 1 through the end, in coil number order.
X2
CHKST
X8
SM400
CHK
CHKCIR
X10Z0
X12Z0
Y40Z0 X6Z0
Y5EZ0 X21Z0
Y46Z0
X1AZ0
Y5FZ0 X22Z0
SM400
CHKEND
F0
F1
F2
X8Z0
X18
X1A
Y48
XE
Y66 X29
Y4E
X22
Y67
X2A
F0
F1
F2
X10
X12 X14 Y42
X8
Y60 X23 Y48 X1C
Y61
X24
F0
F1
F2
XA
[Ladder specified by CHKCIR to CHKEND] [Order of check by CPU module]
Ladder
equivalent to X2
Ladder
equivalent to X8
X2
CHKST
X8
SM400
CHK
CHKCIR
SM400
CHKEND
F0
F1
F2
Y66 X29
Y4E
X22
Y67
X2A
F2
X12 X14 Y42
X8
X12 X14 XA
F0
F0
F1
X18
X1A
Y48
XE
X18
X1A
X10
F1
Y60 X23 Y48
X1C
X61
X24
F2
X10Z0
X12Z0
Y40Z0 X6Z0
Y5EZ0 X21Z0
Y46Z0
X1AZ0
Y5FZ0 X22Z0
X8Z0
[Ladder specified by CHKCIR to CHKEND] [Order of check by CPU module]
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