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7 APPLICATION INSTRUCTIONS
7.10 Debugging and Failure Diagnosis Instructions
• Failure checks check the ON/OFF status of OUT F by using the ladder pattern in the various check conditions. In all
check conditions, SM80 will be turned ON if even one of the OUT F is ON in a ladder pattern. Further, the error numbers
(contact numbers and coil numbers) corresponding to the OUT F which were found to be ON will be stored from SD80 in
BCD order.
• The instructions that can be used in ladder patterns are as follows:
• The following devices can be used for ladder pattern contacts: Input (X) and Output (Y).
• Only annunciators (F) can be used in ladder pattern coils. However, since annunciators (F) are used as a dummy, any
value can be set for an annunciator (F). Further, they can overlap with no difficulties.
• ON/OFF controls can be performed without error if an annunciator (F) used during the execution of the CHK instruction has
the same number as an annunciator (F) used in some other context than the CHK instruction. They will be treated
differently during the CHK instruction than they are in the different context.
• The annunciators (F) used in the CHK instruction do not actually turn ON/OFF. Even when they are monitored from an
external device, the ON/OFF status cannot be checked.
• A ladder pattern can be created up to 256 steps. Further, OUT F can use up to 9 coils.
• Coil numbers for ladders designated with the CHKCIR through CHKEND instructions are allocated coil numbers from 1 to
9, from top to bottom.
• The CHKCIR and CHKEND instructions can be written at any step in the program desired. It can be used in up to two
locations in all program files being executed. However, the CHKCIR and CHKEND instructions cannot be used in more
than 1 location in a single program file.
• The CHKCIR and CHKEND instructions cannot be used in low speed execution type programs. If a program file in which
the CHKCIR or CHKEND instruction is described is set as a low speed execution type program, an operation error will
occur, and the High Performance model QCPU/Process CPU/Redundant CPU operation will be suspended.
Type Instruction
Contact LD, LDI, AND, ANI, OR, ORI, ANB, ORB, MPS, MPP, MRD, and comparative operation instructions
Coil OUT F
CHKCIR
SM400
CHKEND
SM400
Coil No. 1
Coil No. 9
Coil No. 2
Coil No. 8
F
F
F
F
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