850
9 MULTIPLE CPU DEDICATED INSTRUCTIONS
9.1 Writing to the CPU Shared Memory of Host CPU
• In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and an error code is stored into SD0.
• The following program stores 10 points of data from D0 into address 800H of the CPU shared memory of CPU No. 1 when
X0 is turned ON.
Error
code
Error details Q00J/
Q00/
Q01
QnH QnPH QnPRH QnU LCPU
2107 When the head I/O number (n1) of the host CPU is other than that of the host
CPU.
2110 No CPU module is installed at the position specified for the head I/O number
of the CPU module.
4002 When the specified instruction is improper.
4003 When the number of devices specified is incorrect.
4004 When an Unavailable device is specified.
4100 When the head I/O number (n1) of the host CPU is other than 3E0H/3E1H/
3E2H/3E3H.
4101 When the host CPU operation information area, system area, or host CPU
refresh area is specified to the CPU shared memory address (n2) of the write
destination.
When the number of write points (n4) is outside the specified range of the
setting data.
When the head of the CPU shared memory address (n2) of the write
destination host CPU exceeds the CPU shared memory address range.
When the CPU shared memory address (n2) + the number of write points
(n4) of the write destination host CPU exceeds the CPU shared memory
address range.
When the head number of the devices (n3) where the data to be written is
stored + the number of write points (n4) exceeds the device range.
4111 When the host CPU operation information area, system area, or host CPU
refresh area is specified to the CPU shared memory address (n2) of the write
destination.
4112 When the head I/O number (n1) of the host CPU is other than that of the host
CPU.
[Ladder Mode] [List Mode]
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