Mitsubishi Electric MELSEC-Q/L - Page 854

852
9 MULTIPLE CPU DEDICATED INSTRUCTIONS
9.1 Writing to the CPU Shared Memory of Host CPU
• When a constant is specified to (S), writes the same data (value specified to (S)) to the area of n3 words from the specified
CPU shared memory.
*1 Usable as a user free area when auto refresh setting is not made.
In addition, even when auto refresh setting is made, the auto refresh send range or later is usable as a user free area.
*2 With the following CPU modules, data cannot be written to the multiple CPU high speed transmission area.
Q00UCPU, Q01UCPU, Q02UCPU
• No processing is performed when the number of write points is 0.
• The number of write data varies depending on the target CPU module.
• CPU shared memory address of the Basic model QCPU
• CPU shared memory address of the Universal model QCPU
*2
CPU module Number of write points
Basic model QCPU 1 to 320
Universal model QCPU 1 to 14336
Constant
(When "5" is designated
for )
CPU shared memory
of host CPU (n1)
n2
S
5
5
5
5
n3 words
Writes the
same data to
the area of n3
words
5
S
0(0H)
96(60H)
192(C0H)
511(1FFH)
Host CPU operation information area
CPU shared memory address
System area
Host CPU refresh area
*1
User free area
Write designation
prohibited area
Write designation
permitted area
0(0H)
512(200H)
2048(800H)
4096(1000H)
10000(2710H)
24335(5F0FH)
Host CPU operation information area
CPU shared memory address
System area
Host CPU refresh area
*1
User free area
Write designation
prohibited area
Write designation
permitted area
Unusable
Multiple CPU high speed
transmission area