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CPM1/CPM1A Interrupt Functions Section 1-6
2. With the INT(89) instruction, refresh the Counter Mode set value and en-
able interrupts.
Be sure to set the corresponding bit to 1 if an input interrupt isn’t being con-
trolled.
The input interrupt for which the set value is refreshed will be enabled in
Counter Mode. When the counter reaches the set value, an interrupt will
occur, the counter will be reset, and counting/interrupts will continue until the
counter is stopped.
Note 1. If the INT(89) instruction is used during counting, the present value (PV)
will return to the set value (SV). You must, therefore, use the differentiated
form of the instruction or an interrupt may never occur.
2. The set value will be set when the INT(89) instruction is executed. If inter-
rupts are already in operation, then the set value will not be changed just
by changing the content of SR 240 to SR 243, i.e., if the contents are
changed, the set value must be refreshed by executing the INT(89) instruc-
tion again.
Interrupts can be masked using the same process used with the Input Inter-
rupt Mode, but if the masked interrupts are cleared using the same process,
the interrupts will operate in Input Interrupt Mode, not Counter Mode.
Interrupt signals received for masked interrupts can also be cleared using the
same process as for the Input Interrupt Mode.
Counter PV in Counter Mode
When input interrupts are used in Counter Mode, the counter PV will be
stored in the SR word corresponding to input interrupts 0 to 3. Values are
0000 to FFFE (0 to 65,534) and will equal the counter PV minus one.
Example: The present value for an interrupt whose set value is 000A will be
recorded as 0009 immediately after INT(89) is executed.
Note Even if input interrupts are not used in Counter Mode, these SR bits cannot be
used as work bits.
Program Example
When input 00003 (interrupt no. 0) goes ON 10 times, operation moves imme-
diately to the interrupt program with subroutine number 000. The following
(@)INT(89)
003
000
D
If D bits 0 to 3, which correspond to input interrupts 0 to 3,
are set to "0," then the set value will be refreshed and inter-
rupts will be permitted.
0: Counter mode set value refreshed and mask cleared.
1: Not refreshed.
Interrupt Word
Input interrupt 0 SR 244
Input interrupt 1 SR 245
Input interrupt 2 SR 246
Input interrupt 3 SR 247