The STM32 Cortex-M4 instruction set PM0214
116/262 PM0214 Rev 9
The SMLALD and SMLALDX instructions interpret the values from Rn and Rm as four
halfword two’s complement signed 16-bit integers. These instructions:
• If X is not present, multiply the top signed halfword value of Rn with the top signed
halfword of Rm and the bottom signed halfword values of Rn with the bottom signed
halfword of Rm.
• Or if X is present, multiply the top signed halfword value of Rn with the bottom signed
halfword of Rm and the bottom signed halfword values of Rn with the top signed
halfword of Rm.
• Add the two multiplication results to the signed 64-bit value in RdLo and RdHi to create
the resulting 64-bit product.
• Write the 64-bit product in RdLo and RdHi.
Restrictions
In these instructions:
Do not use either SP or PC.
RdHi and RdLo must be different registers.
Condition flags
These instructions do not affect the condition code flags.
Examples
SMLAL R4, R5, R3, R8 ; Multiplies R3 and R8, adds R5:R4 and writes to
; R5:R4
SMLALBT R2, R1, R6, R7 ; Multiplies bottom halfword of R6 with top
; halfword of R7, sign extends to 32-bit, adds
; R1:R2 and writes to R1:R2
SMLALTB R2, R1, R6, R7 ; Multiplies top halfword of R6 with bottom
; halfword of R7,sign extends to 32-bit, adds R1:R2
; and writes to R1:R2
SMLALD R6, R8, R5, R1 ; Multiplies top halfwords in R5 and R1 and bottom
; halfwords of R5 and R1, adds R8:R6 and writes to
; R8:R6
SMLALDX R6, R8, R5, R1 ; Multiplies top halfword in R5 with bottom
; halfword of R1, and bottom halfword of R5 with
; top halfword of R1, adds R8:R6 and writes to
; R8:R6.