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ST STM32H7 Series User Manual

ST STM32H7 Series
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PM0214 Rev 9 191/262
PM0214 The STM32 Cortex-M4 instruction set
261
3.11.11 WFE
Wait For Event. WFE is a hint instruction.
Syntax
WFE{cond}
Where: ‘cond’ is an optional condition code, see Conditional execution on page 65.
Operation
If the event register is 0, WFE suspends execution until one of the following events occurs:
• An exception, unless masked by exception mask registers or the current priority level
• An exception enters Pending state, if SEVONPEND in System Control Register is set
• A Debug Entry request, if Debug is enabled
• An event signaled by a peripheral or another processor in a multiprocessor system
using the SEV instruction.
If the event register is 1, WFE clears it to 0 and returns immediately.
For more information see Power management on page 47.
Condition flags
This instruction does not change the flags.
Examples
WFE ; Wait for event

Table of Contents

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ST STM32H7 Series Specifications

General IconGeneral
BrandST
ModelSTM32H7 Series
CategoryComputer Hardware
LanguageEnglish

Summary

About this document

Typographical Conventions

Defines formatting used in the document for clarity.

List of Abbreviations for Registers

Provides a list of abbreviations used in register descriptions for quick reference.

STM32 Cortex-M4 Processor Overview

Introduces the STM32 Cortex-M4 processor's architecture and key features.

The Cortex-M4 Processor

Programmer's Model

Describes registers, modes, and privilege levels for software execution.

Memory Model

Details the processor's memory map, access behavior, and bit-banding features.

Exception Model

Explains exception states, types, priorities, and handling mechanisms.

Fault Handling

Covers fault types, escalation, status registers, and lockup conditions.

Power Management

Describes mechanisms for entering and exiting low-power sleep modes.

The STM32 Cortex-M4 Instruction Set

Instruction Set Summary

Lists supported Cortex-M4 instructions and their organization.

Memory Access Instructions

Details instructions for loading and storing data from/to memory.

General Data Processing Instructions

Explains instructions for arithmetic, logical, and data manipulation.

Multiply and Divide Instructions

Describes instructions for multiplication and division operations.

Floating-Point Instructions

Details instructions for FPU operations, including VFPv4-SP extension.

Miscellaneous Instructions

Covers instructions like breakpoints, barriers, and supervisor calls.

Core Peripherals

About the STM32 Cortex-M4 Core Peripherals

Introduces the core peripherals accessible via the Private Peripheral Bus (PPB).

Memory Protection Unit (MPU)

Explains the MPU for memory region definition and access control.

Nested Vectored Interrupt Controller (NVIC)

Describes the NVIC for managing interrupts and exceptions with priority levels.

System Control Block (SCB)

Details registers for system control, configuration, and exception reporting.

SysTick Timer (STK)

Explains the 24-bit SysTick timer for system timing and RTOS ticks.

Floating Point Unit (FPU)

Describes the FPU for single-precision floating-point operations.

Revision History

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