PM0214 Rev 9 105/262
PM0214 The STM32 Cortex-M4 instruction set
261
UHSUB8 R4, R0, R5 ; Subtracts bytes of R5 from corresponding byte in R0 and
; writes halved result to corresponding byte in R4.
3.5.21 SEL
Select bytes. Selects each byte of its result from either its first operand or its second
operand, according to the values of the GE flags.
Syntax
SEL{<c>}{<q>} {<Rd>,} <Rn>, <Rm>
Where:
• <c>, <q> are standard assembler syntax fields.
• <Rd> is the destination register.
• <Rn> is the first operand register.
• <Rm> is the second operand register.
Operation
The SEL instruction:
1. Reads the value of each bit of APSR.GE.
2. Assigns the destination register the value of either the first or second operand register,
depending on the value of APSR.GE.
Restrictions
None.
Condition flags
These instructions do not change the flags.
Examples
SADD16 R0, R1, R2 ; Set GE bits based on result
SEL R0, R0, R3 ; Select bytes from R0 or R3, based on GE.