ST STM32H7 Series User Manual

PM0214 Rev 9 105/262
PM0214 The STM32 Cortex-M4 instruction set
261
UHSUB8 R4, R0, R5 ; Subtracts bytes of R5 from corresponding byte in R0 and
; writes halved result to corresponding byte in R4.
3.5.21 SEL
Select bytes. Selects each byte of its result from either its first operand or its second
operand, according to the values of the GE flags.
Syntax
SEL{<c>}{<q>} {<Rd>,} <Rn>, <Rm>
Where:
• <c>, <q> are standard assembler syntax fields.
• <Rd> is the destination register.
• <Rn> is the first operand register.
• <Rm> is the second operand register.
Operation
The SEL instruction:
1. Reads the value of each bit of APSR.GE.
2. Assigns the destination register the value of either the first or second operand register,
depending on the value of APSR.GE.
Restrictions
None.
Condition flags
These instructions do not change the flags.
Examples
SADD16 R0, R1, R2 ; Set GE bits based on result
SEL R0, R0, R3 ; Select bytes from R0 or R3, based on GE.

ST STM32H7 Series Specifications

General

Brand	ST
Model	STM32H7 Series
Category	Computer Hardware
Language	English

Summary

About this document

Typographical Conventions

Defines formatting used in the document for clarity.

List of Abbreviations for Registers

Provides a list of abbreviations used in register descriptions for quick reference.

STM32 Cortex-M4 Processor Overview

Introduces the STM32 Cortex-M4 processor's architecture and key features.

The Cortex-M4 Processor

Programmer's Model

Describes registers, modes, and privilege levels for software execution.

Memory Model

Details the processor's memory map, access behavior, and bit-banding features.

Exception Model

Explains exception states, types, priorities, and handling mechanisms.

Fault Handling

Covers fault types, escalation, status registers, and lockup conditions.

Power Management

Describes mechanisms for entering and exiting low-power sleep modes.

The STM32 Cortex-M4 Instruction Set

Instruction Set Summary

Lists supported Cortex-M4 instructions and their organization.

Memory Access Instructions

Details instructions for loading and storing data from/to memory.

General Data Processing Instructions

Explains instructions for arithmetic, logical, and data manipulation.

Multiply and Divide Instructions

Describes instructions for multiplication and division operations.

Floating-Point Instructions

Details instructions for FPU operations, including VFPv4-SP extension.

Miscellaneous Instructions

Covers instructions like breakpoints, barriers, and supervisor calls.

Core Peripherals

About the STM32 Cortex-M4 Core Peripherals

Introduces the core peripherals accessible via the Private Peripheral Bus (PPB).

Memory Protection Unit (MPU)

Explains the MPU for memory region definition and access control.

Nested Vectored Interrupt Controller (NVIC)

Describes the NVIC for managing interrupts and exceptions with priority levels.

System Control Block (SCB)

Details registers for system control, configuration, and exception reporting.

SysTick Timer (STK)

Explains the 24-bit SysTick timer for system timing and RTOS ticks.

Floating Point Unit (FPU)

Describes the FPU for single-precision floating-point operations.

Revision History